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PC312XDP512F0CFVR Datasheet(PDF) 355 Page - Freescale Semiconductor, Inc |
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PC312XDP512F0CFVR Datasheet(HTML) 355 Page - Freescale Semiconductor, Inc |
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355 / 1348 page  Chapter 7 Enhanced Capture Timer (S12ECT16B8CV2) MC9S12XDP512 Data Sheet, Rev. 2.21 Freescale Semiconductor 355 Figure 7-69. 8-Bit Pulse Accumulators Block Diagram P0 Load Holding Register and Reset Pulse Accumulator 0 0 EDG3 EDG2 EDG1 EDG0 Edge Detector Delay Counter Interrupt Interrupt P1 Edge Detector Delay Counter P2 Edge Detector Delay Counter P3 Edge Detector Delay Counter PA0H Holding 0 8-Bit PAC1 (PACN1) 0 8-Bit PAC2 (PACN2) PA2H Holding 0 8-Bit PAC3 (PACN3) PA3H Holding 8-Bit PAC0 (PACN0) 8, 12,16, ..., 1024 8, 12,16, ..., 1024 8, 12,16, ..., 1024 8, 12,16, ..., 1024 Register PA1H Holding Register Register Register |
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