PC312XDP512F0CFVR datasheet(425/1348 Pages) FREESCALE

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Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV3)

MC9S12XDP512 Data Sheet, Rev. 2.21

Freescale Semiconductor

425

Write: Anytime when out of initialization mode; exceptions are read-only RXACT and SYNCH, RXFRM

(which is set by the module only), and INITRQ (which is also writable in initialization mode).

Table 10-1. CANCTL0 Register Field Descriptions

Field

Description

RXFRM1

Received Frame Flag — This bit is read and clear only. It is set when a receiver has received a valid message

correctly, independently of the ﬁlter conﬁguration. After it is set, it remains set until cleared by software or reset.

Clearing is done by writing a 1. Writing a 0 is ignored. This bit is not valid in loopback mode.

0 No valid message was received since last clearing this ﬂag

1 A valid message was received since last clearing of this ﬂag

RXACT

Receiver Active Status — This read-only ﬂag indicates the MSCAN is receiving a message. The ﬂag is

controlled by the receiver front end. This bit is not valid in loopback mode.

0 MSCAN is transmitting or idle2

1 MSCAN is receiving a message (including when arbitration is lost)2

CSWAI3

CAN Stops in Wait Mode — Enabling this bit allows for lower power consumption in wait mode by disabling all

the clocks at the CPU bus interface to the MSCAN module.

0 The module is not affected during wait mode

1 The module ceases to be clocked during wait mode

SYNCH

Synchronized Status — This read-only ﬂag indicates whether the MSCAN is synchronized to the CAN bus and

able to participate in the communication process. It is set and cleared by the MSCAN.

0 MSCAN is not synchronized to the CAN bus

1 MSCAN is synchronized to the CAN bus

TIME

Timer Enable — This bit activates an internal 16-bit wide free running timer which is clocked by the bit clock rate.

If the timer is enabled, a 16-bit time stamp will be assigned to each transmitted/received message within the

active TX/RX buffer. Right after the EOF of a valid message on the CAN bus, the time stamp is written to the

highest bytes (0x000E, 0x000F) in the appropriate buffer (see Section 10.3.3, “Programmer’s Model of Message

Storage”). The internal timer is reset (all bits set to 0) when disabled. This bit is held low in initialization mode.

0 Disable internal MSCAN timer

1 Enable internal MSCAN timer

WUPE4

Wake-Up Enable — This conﬁguration bit allows the MSCAN to restart from sleep mode when trafﬁc on CAN is

detected (see Section 10.4.5.4, “MSCAN Sleep Mode”). This bit must be conﬁgured before sleep mode entry for

the selected function to take effect.

0 Wake-up disabled — The MSCAN ignores trafﬁc on CAN

1 Wake-up enabled — The MSCAN is able to restart

PC312XDP512F0CFVR Datasheet(PDF) 425 Page - Freescale Semiconductor, Inc

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