PC312XDP512F0CFVR datasheet(619/1348 Pages) FREESCALE

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Chapter 17 Memory Mapping Control (S12XMMCV2)

MC9S12XDP512 Data Sheet, Rev. 2.21

Freescale Semiconductor

619

17.3.2.2

Mode Register (MODE)

Read: Anytime. In emulation modes read operations will return the data read from the external bus. In all

other modes the data are read from this register.

Write: Only if a transition is allowed (see Figure 1-5). In emulation modes write operations will be also

directed to the external bus.

The MODE bits of the MODE register are used to establish the MCU operating mode.

CAUTION

XGATE write access to this register during an CPU access which makes use

of this register could lead to unexpected results.

Address: 0x000B PRR

76543210

MODC

MODB

MODA

00000

Reset

MODC1

MODB1

MODA1

00000

1. External signal (see Table 1-2).

= Unimplemented or Reserved

Figure 17-4. Mode Register (MODE)

Table 17-6. MODE Field Descriptions

Field

Description

7–5

MODC,

MODB,

MODA

Mode Select Bits — These bits control the current operating mode during RESET high (inactive). The external

mode pins MODC, MODB, and MODA determine the operating mode during RESET low (active). The state of

the pins is latched into the respective register bits after the RESET signal goes inactive (see Figure 1-5).

Write restrictions exist to disallow transitions between certain modes. Figure 1-5 illustrates all allowed mode

changes. Attempting non authorized transitions will not change the MODE bits, but it will block further writes to

these register bits except in special modes.

Both transitions from normal single-chip mode to normal expanded mode and from emulation single-chip to

emulation expanded mode are only executed by writing a value of 0b101 (write once). Writing any other value

will not change the MODE bits, but will block further writes to these register bits.

Changes of operating modes are not allowed when the device is secured, but it will block further writes to these

In emulation modes reading this address returns data from the external bus which has to be driven by the

emulator. It is therefore responsibility of the emulator hardware to provide the expected value (i.e. a value

corresponding to normal single chip mode while the device is in emulation single-chip mode or a value

corresponding to normal expanded mode while the device is in emulation expanded mode).

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