TL284x, TL384x

CURRENT-MODE PWM CONTROLLERS

SLVS038G − JANUARY 1989 − REVISED FEBRUARY 2008

9

POST OFFICE BOX 655303

APPLICATION INFORMATION

DEAD TIME

vs

TIMING CAPACITANCE

Figure 4

100

40

10

4

0

100

40

10

4

1

0.4

0.1

TIMING RESISTANCE

vs

FREQUENCY

Figure 5

100

1 k

10 k

100 k

1 M

f − Frequency − Hz

100

40

10

4

1

open-loop laboratory test fixture

In the open-loop laboratory test fixture (see Figure 6), high peak currents associated with loads necessitate

careful grounding techniques. Timing and bypass capacitors should be connected close to the GND terminal

in a single-point ground. The transistor and 5-k

Ω potentiometer sample the oscillator waveform and apply an

adjustable ramp to the ISENSE terminal.

2N2222

4.7 k

Ω

1 k

Ω

Error Amplifier

Adjust

4.7 k

Ω

5 k

Ω

ISENSE

Adjust

100 k

Ω

COMP

VFB

ISENSE

RT/CT

REF

OUTPUT

GND

0.1

µF

0.1

µF

REF

OUTPUT

GND

1 k

Ω, 1 W

A

TL284x

TL384x

DUT

Figure 6. Open-Loop Laboratory Test Fixture