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CDCVF2505DR Datasheet(PDF) 7 Page - Texas Instruments |
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CDCVF2505DR Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 14 page  CDCVF2505 3.3V CLOCK PHASELOCK LOOP CLOCK DRIVER SCAS640E − JULY 2000 − REVISED MARCH 2005 7 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PARAMETER MEASUREMENT INFORMATION 500 Ω Yn = 25 pF || 500 Ω CLKOUT = 12 pF || 500 Ω From Output Under Test Figure 7. Test Load Circuit 50% VDD tpd CLKIN 1Y0 − 1Y3 2 V 0.4 V 50% VDD 2 V 0.4 V tr tf 3 V 0 V VOH VOL Figure 8. Voltage Threshold for Measurements, Propagation Delay (tpd) tsk(o) Any Y Any Y 50 % VDD 50 % VDD Figure 9. Output Skew tc1 tc2 tc(jit_CC) = tc1 − tc2 Figure 10. Cycle-to-Cycle Jitter |
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