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SC121 Datasheet(PDF) 17 Page - Semtech Corporation |
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SC121 Datasheet(HTML) 17 Page - Semtech Corporation |
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17 / 23 page ![]() SC121 17 Applications Information (continued) PWM Operation The PWM cycle runs at a fixed frequency (f osc = 1.2MHz), with a variable duty cycle (D). PWM operation continually draws current from the input supply, except for low output loads in which current flows periodically from, and back into, the input. During the on-state of the PWM cycle, the n-channel FET is turned on, grounding the inductor at the LX pin. This causes the current flowing from the input supply through the inductor to ground to ramp up. During the off-state, the n-channel FET is turned off and the p-channel FET (synchronous rectifier) is turned on. This causes the inductor current to flow from the input supply through the inductor into the output capaci- tor and load, boosting the output voltage above the input voltage. The cycle then repeats to re-energize the inductor. Ideally, the steady state (constant load) duty cycle is determined by D = 1 – (V IN /V OUT ), but must be greater in practice to overcome dissipative losses. The SC121 PWM controller constrains the value of D such that 0.20 < D < 0.90 (approximately). The average inductor current during the off-state multi- plied by (1-D) is equal to the average load current. The inductor current is alternately ramping up (on-state) and down (off-state) at a rate and amplitude determined by the inductance value, the input voltage, and the on-time (T ON = D×T, T = 1/f OSC ). Therefore, the instantaneous induc- tor current will be alternately larger and smaller than the average. If the average output current is sufficiently small, the minimum inductor current can ramp down to zero during the off-state. Discontinuous mode operation (where both FETs turn off as the inductor current reaches zero) is not supported in the SC121, since this would result in a finite positive minimum current from input to output, which would cause an uncontrolled rise in output voltage in this case. Instead, the inductor current will reverse for the remainder of the off-state, flowing from the output capacitor into the OUT pin, through the p-channel FET to the LX pin, and through the inductor to the input capaci- tor. Negative inductor current ripple allows regulation even with zero output load. The energy returned to the input capacitor is not wasted, but dissipative conduction losses will inevitably occur. The minimum on-time limitation imposes a minimum boost ratio, so if V IN is too close to V OUT (V IN > V OUT – 400mV, approximately), V OUT will rise above the programmed value for a sufficiently small output load. A higher output load requires a higher duty cycle to overcome dissipative losses, such that regulation at programmed V OUT will eventually be restored. But this regulation-restoration load rises rapidly with V IN , so this phenomenon can be beneficially exploited in only rare circumstances. If opera- tion with high V IN and low load is required, please consider using the SC120, a pin compatible dual mode (PWM/ PSAVE) boost converter. The SC120 will support zero load in PSAVE mode for V IN up to V OUT + 150mV. Regulator Startup, Short Circuit Protection, and Current Limits The SC121 permits power up at input voltages from 0.85V to 4.5V. Soft-start startup current limiting of the internal switching n-channel and p-channel FET power devices protects them from damage in the event of a short between OUT and GND. As the output voltage rises, pro- gressively less-restrictive current limits are applied. This protection unavoidably prevents startup into an exces- sive load. Upon enable, the p-channel FET between the LX and OUT pins turns on with its current limited to approximately 150mA, the short-circuit output current. When V OUT approaches V IN (but is still below 1.7V), the n-channel current limit is set to 350mA (the p-channel limit is dis- abled), the internal oscillator turns on (approximately 200kHz), and a fixed 75% duty cycle PWM operation begins. (See the section PWM Operation.) When the output voltage exceeds 1.7V, fixed frequency PWM opera- tion begins, with the duty cycle determined by an n- channel FET peak current limit of 350mA. When this n-channel FET startup current limit is exceeded, the on- state ends immediately and the off-state begins. This determines the duty cycle on a cycle-by-cycle basis. When V OUT is within 2% of the programmed regulation voltage, the n-channel FET current limit is raised to 1.2A, and normal voltage regulation PWM control begins. Once normal voltage regulation PWM control is initiated, the output becomes independent of V IN and output regu- lation can be maintained for V IN as low as 0.7V, subject to the maximum duty cycle and peak current limits. The |
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