8

Multimedia ICs

BA7230LS

SZIP24

0.889

1

2

23

24

0.5

± 0.1

+ 0.1

– 0.05

2.54

± 0.25

0.3

21.8

± 0.2

2.8

± 0.2

(1) RGB and video inputs should be synchronized.

When only RGB is input, connect VIDEO IN (pin 20) to

GND with a 1

µF capacitor, and synchronize PCP and

BFP to RGB.

(3) Input pins with pedestal clamps cannot be left open

and must be grounded with a low impedance. When

not used, ground with a 1

µF capacitor.

∗Input pins with pedestal clamps:

(2) The VCXO remains in a

free-running state except

during superimposition.

ance and are susceptible

to the effects of noise and

other external factors dur-

ing pattern generation. For

this reason, we recom-

mend adding the circuit in

Fig. 15 to lower the input

impedance. Adding this cir-

cuit can also reduce carrier

leakage.

1

µF

1

µF

Fig. 14

Ω

18

1.2mH

LPF

0.5MHz

Ω

17

4

(ROHM)

3k

Ω

3k

Ω

300

Ω

1

µF

1

+

300

Ω

5

1.2mH

Fig. 15

+ lock

+ cap

400

600

200

– 200

– 400

– 600

0

200

400

600 700

500

300

100

800

– cap

– lock

Fig. 13 Capture range and

lock range (@) vs. input

voltage