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AT90PWM3 Datasheet(PDF) 138 Page - ATMEL Corporation |
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AT90PWM3 Datasheet(HTML) 138 Page - ATMEL Corporation |
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138 / 361 page  138 4317J–AVR–08/10 AT90PWM2/3/2B/3B Figure 16-9. PSCn0 & PSCn1 Basic Waveforms in Center Aligned Mode On-Time 0 = 2 * OCRnSAH/L * 1/Fclkpsc On-Time 1 = 2 * (OCRnRBH/L - OCRnSBH/L + 1) * 1/Fclkpsc Dead-Time = (OCRnSBH/L - OCRnSAH/L) * 1/Fclkpsc PSC Cycle = 2 * (OCRnRBH/L + 1) * 1/Fclkpsc Note: Minimal value for PSC Cycle = 2 * 1/Fclkpsc OCRnRAH/L is not used to control PSC Output waveform timing. Nevertheless, it can be useful to adjust ADC synchronization (See “Analog Synchronization” on page 157.). Figure 16-10. Run and Stop Mechanism in Centered Mode Note: See “PSC 0 Control Register – PCTL0” on page 164.(or PCTL1 or PCTL2) On-Time 1 On-Time 0 PSCOUTn0 PSCOUTn1 PSC Cycle Dead-Time On-Time 1 Dead-Time PSC Counter OCRnRB OCRnSA OCRnSB 0 (AT90PWM2B/3B) PSCOUTn1 (AT90PWM2/3) PSCOUTn0 PSCOUTn1 PSC Counter OCRnRB OCRnSA OCRnSB 0 Run PSCOUTn1 (AT90PWM2/3) (AT90PWM2B/3B) |
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