Capacitor at OCP/EN Pin - C

OCP/EN

As the current at start-up may hit its current limit threshold,

the ramp rate of the current must be slow enough to allow

the output capacitor to be fully charged to a voltage one

diode drop V

successful start-up at no load, the value of the capacitor at

the OCP/EN pin has to satisfy the following formula:

Disconnect FET Selection

The floating driving voltage of DRV pin drops slightly as

the supply voltageV

on page 8), where a FET with low gate threshold voltage

(V

application, a FET with V

Fairchild, is needed.

Layout Guidelines

Careful attentions to layout requirements are necessary

for successful implementation of the SC2604 PWM

controller. High currents switching at 400kHz are present

in the application and their effect on ground plane voltage

differentials must be understood and minimized.

) The high power parts of the circuit should be laid out

first. A ground plane should be used, the number and

position of ground plane interruptions should be such as

to not unnecessarily compromise ground plane integrity.

Isolated or semi-isolated areas of the ground plane may

be deliberately introduced to constrain ground currents

to particular areas, for example the input capacitor and

bottom Schottky ground.

2) The loop formed by the output Capacitor(s) (C

FET (Q

(D

layout diagram in Figure 4. This loop contains all the high

current, fast transition switching. Connections should

be as wide and as short as possible to minimize loop

inductance. Minimizing this loop area will reduce EMI,

SC2604

0

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Applications Information (Cont.)

soft-start of the switching boost regulator.

The DRV pin of the SC2604 is meant to drive an N-Channel

FET that can disconnect the input supply in the event of an

over-current condition. The OCP/EN capacitor becomes

part of a hiccup oscillator that is charged with 37µA and

discharged with µA to provide a low duty cycle for the

FET Q

It should be understood that sufficiently fast ramp rates

on the OCP/EN pin and the SS/VREF pin can trigger a

hiccup event because of the charging current demanded

by the boost regulator output capacitor.

Setting the Output Voltage

In Figure , an external resistive divider R

center tap tied to the FB pin sets the output voltage.

In some applications, a RC branch (R

Schematic on page 2) will be needed for loop stability.

Maximum Duty Cycle

The maximum duty cycle, D

power conversion ratio

Calculating Current Sense Resistor

Current sense resistor is placed at the input to sense

inductor peak current of the boost regulator. The value of

the resistor can be calculated by

where I

Inmanyapplications,anoisefiltercircuit(R

in the Typical Schematic on page 2) may be needed for

the input current sensing.