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74AHCT240D Datasheet(PDF) 7 Page - NXP Semiconductors

Part # 74AHCT240D
Description  Octal buffer/line driver; inverting; 3-state
PDF  16 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

74AHCT240D Datasheet(HTML) 7 Page - NXP Semiconductors

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74AHC_AHCT240
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 26 November 2010
7 of 16
NXP Semiconductors
74AHC240; 74AHCT240
Octal buffer/line driver; inverting; 3-state
[1]
Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V).
[2]
tpd is the same as tPLH and tPHL; ten is the same as tPZH and tPZL; tdis is the same as tPLZ and tPHZ.
[3]
CPD is used to determine the dynamic power dissipation (PD in W).
PD =CPD  VCC2  fi  N + (CL  VCC2  fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(C
L  VCC
2
 f
o) = sum of outputs.
11. Waveforms
74AHCT240
tpd
propagation delay
nAn to nYn; see Figure 5
[2]
VCC = 4.5 V to 5.5 V; CL = 15 pF
-
3.0
5.8
1.0
6.8
8.5
ns
VCC = 4.5 V to 5.5 V; CL = 50 pF
-
4.4
8.4
1.0
9.5
11.9
ns
ten
enable time
nOE to nYn; see Figure 6
[2]
VCC = 4.5 V to 5.5 V; CL = 15 pF
-
3.4
7.5
1.0
9.0
14.4
ns
VCC = 4.5 V to 5.5 V; CL = 50 pF
-
4.5
9.5
1.0
11.5
14.4
ns
tdis
disable time
nOE to nYn; see Figure 6
[2]
VCC = 4.5 V to 5.5 V; CL = 15 pF
-
3.9
6.1
1.0
6.7
8.3
ns
VCC = 4.5 V to 5.5 V; CL = 50 pF
-
6.2
8.7
1.0
9.2
11.5
ns
CPD
power dissipation
capacitance
VI = GND to VCC; CL =50pF;
fi =1MHz
[3]
-9
-
-
-
-
pF
Table 7.
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7.
Symbol Parameter
Conditions
25
C
40 C to +125 C
Unit
Min
Typ[1]
Max
Min
Max
(85
C)
Max
(125
C)
Measurement points are given in Table 8.
VOL and VOH are typical voltage output drop that occur with the output load.
Fig 5.
Propagation delay input (nAn) to output (nYn)
mgu781
nAn input
nYn output
tPHL
tPLH
GND
VI
VM
VM
VM
VM
VOH
VOL



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