GD82551QM datasheet(2/120 Pages) INTEL

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Datasheet

Revision History

Revision

Date

Revision

Description

Oct 2001

0.6

•

Removed references to IPSec support and changed description of FLA1/AUXPWR to use a

pull-up resistor if auxiliary power is present, else leave it disconnected.

•

Changed description of VCCR to show connecting it directly to main 3.3V supply and reduced

text describing bus operations.

•

Reduced PHY functional description to overview level and reorganized manageability section,

adding ASF text. Added 0Fh as Revision ID and added targeted Icc specs.

Dec 2001

1.0

•

Added description for No Connect pins and corrected typographical errors.

Apr 2002

2.0

Changed document status to Intel Confidential.

Mar 2003

2.1

•

Removed document status and removed references to MDI/MDI-X feature, which is not sup-

ported by the 82551QM

Jun 2003

3.0

•

Added information for the 82551IT.

Oct 2003

3.1

•

Corrected operating temperature range in specifications to 0° to 70° C.

Mar 2004

3.11

•

Added operating temperature reference to Section 1.1

Oct 2004

3.2

•

Removed operating temperature reference to Section 1.1.

•

Added references to MDI/MDI-X feature, which is now supported by the 82551QM and

removed information for the 82551IT.

Nov 2004

3.3

•

Updated the section describing “Multiple Priority Transmit Queues”.

•

Added information about migrating from a 2-layer 0.36 mm wide-trace substrate to a 2-layer

0.32 mm wide-trace substrate. Refer to the section on Package and Pinout Information.

•

Added statement that no changes to existing soldering processes are needed for the 2-layer

0.32 mm wide-trace substrate change in the section describing “Package Information”.

Jan 2005

3.4

•

Added a note for PHY signals RBIAS100 and RBIAS10 to Table 9.

Apr 2006

3.5

•

Changed case temperature specification to “0° C to 85° C”.

Oct 2006

3.6

•

Added Figure 31 “196 PBGA Package Pad Detail”. The figure shows solder resist opening and

metal diameter dimensions.

July 2007

3.7

•

Added Section 15 “Reference Schematics”, updated Section 12.1 (changed Tcase to ambient)

and added ordering information to Section 1.4.

Sept 2007

3.8

•

Updated Figures 34 and 35. Added Digital I/O and Crystal Input One (X1) Characteristics

(Tables 70 and 71). Updated Section 5.8.4.

Mar 2008

3.9

•

Updated Figure 35: changed TEST pull down resistor value (62 K

 to 1 K).

Nov 2008

4.0

•

Updated Table 9 (X1 and X2 pin descriptions).

•

Updated Tables 70 and 71 (Digital I/O and crystal input one (X1) characteristics).

Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual

property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability

whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to

fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not

intended for use in medical, life saving, or life sustaining applications.

Intel may make changes to specifications and product descriptions at any time, without notice.

Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for

future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.

The 82551QM may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current

characterized errata are available on request.

Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.

Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be obtained from:

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