MRF49XA datasheet(13/102 Pages) MICROCHIP

13 / 102 page

Preliminary

DS70590B-page 11

MRF49XA

2.1

Power and Ground Pins

The power supply bypassing is very essential for better

handling of signal surges and noise in the power line.

The large value decoupling capacitors should be

placed at the PCB power input. The smaller value

decoupling capacitors should be placed at every power

point of the device and at bias points for the RF port.

Poor bypassing leads to conducted interference which

can cause noise and spurious signals to couple into the

RF sections, thereby significantly reducing the

performance.

The VDD pin requires two bypass capacitors to ensure

sufficient bypass and decoupling. However, based on

the selected carrier frequency, the bypass capacitor

values vary. The recommended bypass capacitor

values are listed in Table 2-2 and the type of capacitor

to be used is listed in Table 2-3. The bypass capacitors

are connected to pin 14, as shown in Figure 4-1. The

trace length (VDD pin to bypass capacitors) should be

made as short as possible.

2.2

RESET Pin

An external hardware Reset of MRF49XA can be per-

formed by asserting the RESET (pin 10) to low. After

releasing the pin, it takes slightly more than 0.25 ms for

the transceiver to be released from the Reset. The pin

is driven with an open-drain output, and hence, it is

pulled down while the device is in POR. The RESET

pin has an internal, weak, on-chip, pull-up resistor. The

device will not accept commands during the Reset

period.

The device enters the Reset mode if any of the

following events take place:

• Power-on Reset

• Power Glitch Reset

• Software Reset

• RESET Pin

Software Reset can be issued by sending the appropri-

ate control command to the device. The result of the

command is similar to POR, but the duration of the

Reset event is much less, typically 0.25 ms. The Soft-

ware Reset works only when the Sensitive Reset mode

is selected. See Section 3.1 “Reset” for details on

Reset; for connection details, see Figure 4-1.

2.3

Power Amplifier

The Power Amplifier (PA) has an open-collector differen-

tial output and can directly drive different PCB antennas,

like loop or dipole, with a programmable output power

level during signal transmission. However, certain types

of antennas, like monopole, need an additional matching

circuitry. A built-in, automatic antenna tuning circuit is

used to avoid the manual tuning and trimming

procedures during production process; the so called

“hand effect”.

2.4

Low Noise Amplifier

The Low Noise Amplifier (LNA) has approximately

250

Ω of differential input impedance which functions

well with the proposed antenna (PCB/Monopole) dur-

ing signal transmission. The LNA, when connected to

the 50

Ω device, needs an external matching circuit

(Balun) for correct matching and to minimize the noise

figure of the receiver.

The LNA gain can be selected in four steps for different

gain factors (between 0 and -20 dB relative to the high-

est gain) based on the required RF signal strength.

This gain selection feature is useful in a noisy

environment.

TABLE 2-2:

RECOMMENDED BYPASS

CAPACITORS VALUE

Band

(MHz)

C1(

μF)

C2 (nF)

C3 (pF)

433

2.2

220

868

2.2

915

2.2

TABLE 2-3:

RECOMMENDED BYPASS

CAPACITORS

Property

SMD Size

0603

Dielectric

Tantalum

Ceramic

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