PIC24FJ64GA datasheet(46/262 Pages) MICROCHIP

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PIC24FJ64GA004 FAMILY

DS39881C-page 44

Preliminary

4.6.1

PROGRAMMING ALGORITHM FOR

FLASH PROGRAM MEMORY

The user can program one row of Flash program memory

at a time. To do this, it is necessary to erase the 8-row

erase block containing the desired row. The general

process is:

Read

eight

rows

program

memory

(512 instructions) and store in data RAM.

Update the program data in RAM with the

desired new data.

Erase the block (see Example 4-1):

Set the NVMOP bits (NVMCON<3:0>) to

‘0010’ to configure for block erase. Set the

ERASE

(NVMCON<6>)

and

WREN

(NVMCON<14>) bits.

Write the starting address of the block to be

erased into the TBLPAG and W registers.

Write 55h to NVMKEY.

Write AAh to NVMKEY.

Set the WR bit (NVMCON<15>). The erase

cycle begins and the CPU stalls for the dura-

tion of the erase cycle. When the erase is

done, the WR bit is cleared automatically.

Write the first 64 instructions from data RAM into

the program memory buffers (see Example 4-1).

Write the program block to Flash memory:

a) Set the NVMOP bits to ‘0001’ to configure

for row programming. Clear the ERASE bit

and set the WREN bit.

b) Write 55h to NVMKEY.

Write AAh to NVMKEY.

d) Set the WR bit. The programming cycle

begins and the CPU stalls for the duration

of the write cycle. When the write to Flash

memory is done, the WR bit is cleared

automatically.

Repeat steps 4 and 5, using the next available

64 instructions from the block in data RAM by

incrementing the value in TBLPAG, until all

512 instructions are written back to Flash

memory.

For protection against accidental operations, the write

initiate sequence for NVMKEY must be used to allow

any erase or program operation to proceed. After the

programming command has been executed, the user

must wait for the programming time until programming

is complete. The two instructions following the start of

the programming sequence should be NOPs, as shown

in Example 4-3.

EXAMPLE 4-1:

ERASING A PROGRAM MEMORY BLOCK

; Set up NVMCON for block erase operation

MOV

#0x4042, W0

;

MOV

W0, NVMCON

; Initialize NVMCON

; Init pointer to row to be ERASED

MOV

#tblpage(PROG_ADDR), W0

;

MOV

W0, TBLPAG

; Initialize PM Page Boundary SFR

MOV

#tbloffset(PROG_ADDR), W0

; Initialize in-page EA[15:0] pointer

TBLWTL W0, [W0]

; Set base address of erase block

DISI

; Block all interrupts with priority <7

; for next 5 instructions

MOV

#0x55, W0

MOV

W0, NVMKEY

; Write the 55 key

MOV

#0xAA, W1

;

MOV

W1, NVMKEY

; Write the AA key

BSET

NVMCON, #WR

; Start the erase sequence

NOP

; Insert two NOPs after the erase

NOP

; command is asserted

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