LATCH

LATCH

ENABLE

Q

DIFFERENTIAL

INPUT

VOLTAGE

COMPARE

50%

50%

50%

Q

Single/Dual, Very Fast TTL Output Comparators

_______________________________________________________________________________________

3

MAX9686 and MAX9698 Timing Diagram (worst case)

Applications Information

Layout

Because of the large gain-bandwidth characteristic of

the MAX9686 and MAX9698, special precautions need

to be taken if the high-speed capabilities of the devices

are to be realized. A PC board with ground plane

should be considered mandatory. All decoupling

capacitors should be mounted as close as possible to

the power-supply pins. For low-impedance applica-

tions, microstrip layout at the input may be helpful.

Close attention should be paid to the bandwidth of the

decoupling and terminating components. Chip compo-

nents to minimize lead inductance can be used as an

advantage. An unused latch enable pin must be con-

nected to ground.

Input Slew-Rate Requirements

As with all high-speed comparators, the high gain-

bandwidth product of these devices creates oscillation

problems when the input traverses through the linear

region. For clean switching without oscillation or steps

in the output waveform, the input must meet certain

minimum slew-rate requirements. The tendency of the

part to oscillate is a function of the layout and the

source impedance of the circuit employed. Both poor

layout and larger source impedance will increase the

minimum slew-rate requirement.

ELECTRICAL CHARACTERISTICS (continued)

MAX9686C/9698C

MAX9686M/9698M

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

UNITS

SWITCHING CHARACTERISTICS (EACH COMPARATOR FOR MAX9698)

Propagation Delays (Guaranteed

Over Full Temperature Range)

Input to Output High

100mV pulse; 10mV

overdrive

6.0

9.0

6.0

9.0

ns

Input to Output Low

100mV pulse; 10mV

overdrive

5.7

8.5

5.7

8.5

ns

Propagation Delay Skew

0.3

0.3

ns

Latch Setup

22

ns