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R26 Datasheet(PDF) 71 Page - Renesas Technology Corp |
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R26 Datasheet(HTML) 71 Page - Renesas Technology Corp |
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71 / 487 page ![]() R8C/26 Group, R8C/27 Group 7. Programmable I/O Ports Rev.2.10 Sep 26, 2008 Page 52 of 453 REJ09B0278-0210 7. Programmable I/O Ports There are 25 programmable Input/Output ports (I/O ports) P0, P1, P3_1, P3_3 to P3_7, P4_5, P5_3, and P5_4. Also, P4_6 and P4_7 can be used as input-only ports if the XIN clock oscillation circuit and XCIN clock oscillation circuit(1) is not used, and the P4_2 can be used as an input-only port if the A/D converter is not used. Table 7.1 lists an Overview of Programmable I/O Ports. NOTE: 1. The XCIN clock oscillation circuit cannot be used for J, K version. NOTES: 1. In input mode, whether an internal pull-up resistor is connected or not can be selected by registers PUR0 and PUR1. 2. When the A/D converter is not used, this port can be used as the input-only port. 3. When the XIN clock oscillation circuit and XCIN clock oscillation circuit (for N, D version only) is not used, these ports can be used as the input-only ports. 7.1 Functions of Programmable I/O Ports The PDi_j (j = 0 to 7) bit in the PDi (i = 0, 1, 3 to 5) register controls I/O of the ports P0, P1, P3_1, P3_3 to P3_7, P4_5, P5_3, and P5_4. The Pi register consists of a port latch to hold output data and a circuit to read pin states. Figures 7.1 to 7.6 show the Configurations of Programmable I/O Ports. Table 7.2 lists the Functions of Programmable I/O Ports. Also, Figure 7.8 shows the PDi (i = 0, 1, and 3 to 5) Register. Figure 7.9 shows the Pi (i = 0, 1, and 3 to 5) Register, Figure 7.10 shows Registers PINSR1, PINSR2, and PINSR3, Figure 7.11 shows the PMR Register, Figure 7.12 shows Registers PUR0 and PUR1, and Figure 7.13 shows the P1DRR Register. i = 0, 1, 3 to 5, j = 0 to 7 NOTE: 1. Nothing is assigned to bits PD3_0, PD3_2, PD4_0 to PD4_4, PD4_6, and PD4_7. Table 7.1 Overview of Programmable I/O Ports Ports I/O Type of Output I/O Setting Internal Pull-Up Resister P0, P1 I/O CMOS3 State Set per bit Set every 4 bits(1) P3_1, P3_3 to P3_7 I/O CMOS3 State Set per bit Set every 2 bits, 4 bits(1) P4_5 I/O CMOS3 State Set per bit Set every bit(1) P5_3, P5_4 I/O CMOS3 State Set per bit Set every bit(1) P4_2(2) P4_6, P4_7(3) I (No output function) None None Table 7.2 Functions of Programmable I/O Ports Operation When Accessing Pi Register Value of PDi_j Bit in PDi Register(1) When PDi_j Bit is Set to 0 (Input Mode) When PDi_j Bit is Set to 1 (Output Mode) Reading Read pin input level Read the port latch Writing Write to the port latch Write to the port latch. The value written to the port latch is output from the pin. |
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