R8C26 datasheet(33/75 Pages) RENESAS

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R8C/26 Group, R8C/27 Group

5. Electrical Characteristics

Rev.2.10

Sep 26, 2008

Page 31 of 69

REJ03B0168-0210

NOTES:

1. VCC = 2.2 to 5.5 V, VSS = 0 V at Topr = -20 to 85

°C (N version) / -40 to 85°C (D version), unless otherwise specified.

2. 1tCYC = 1/f1(s)

Table 5.13

Timing Requirements of Clock Synchronous Serial I/O with Chip Select(1)

Symbol

Parameter

Conditions

Standard

Unit

Min.

Typ.

Max.

tSUCYC

SSCK clock cycle time

−−

tCYC(2)

tHI

SSCK clock “H” width

0.4

−

0.6

tSUCYC

tLO

SSCK clock “L” width

0.4

−

0.6

tSUCYC

tRISE

SSCK clock rising

time

Master

−−

tCYC(2)

Slave

−−

µs

tFALL

SSCK clock falling

time

Master

−−

tCYC(2)

Slave

−−

µs

tSU

SSO, SSI data input setup time

100

−−

SSO, SSI data input hold time

−−

tCYC(2)

tLEAD

SCS setup time

Slave

1tCYC + 50

−−

tLAG

SCS hold time

Slave

1tCYC + 50

−−

tOD

SSO, SSI data output delay time

−−

tCYC(2)

tSA

SSI slave access time

2.7 V

≤ VCC ≤ 5.5 V

−−

1.5tCYC + 100

2.2 V

≤ VCC < 2.7 V

−−

1.5tCYC + 200

tOR

SSI slave out open time

2.7 V

≤ VCC ≤ 5.5 V

−−

1.5tCYC + 100

2.2 V

≤ VCC < 2.7 V

−−

1.5tCYC + 200

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