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PCA85232 Datasheet(PDF) 28 Page - NXP Semiconductors |
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PCA85232 Datasheet(HTML) 28 Page - NXP Semiconductors |
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28 / 54 page ![]() PCA85232 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 1 — 8 December 2010 28 of 54 NXP Semiconductors PCA85232 LCD driver for low multiplex rates [1] Nominal frame frequency calculated for an internal operating frequency of 3.5 kHz. [2] Power-on and reset value. 7.18 Display controller The display controller executes the commands identified by the command decoder. It contains the status registers of the PCA85232 and co-ordinates their effects. The controller is also responsible for loading display data into the display RAM as required by the filling order. Table 16. Frame-frequency prescaler Bit Symbol Value Description Nominal frame frequency[1] Equation 7 to 4 - 11101 fixed value 3 to 0 F[2:0] defines the division factor for the frame frequency (ffr) 000 117 Hz 001 126 Hz 010 137 Hz 011[2] 146 Hz 100 156 Hz 101 167 Hz 110 176 Hz 111 146 Hz f fr 64 80 ------ f clk 24 -------- × = f fr 64 74 ------ f clk 24 -------- × = f fr 64 68 ------ f clk 24 -------- × = f fr f clk 24 -------- = f fr 64 60 ------ f clk 24 -------- × = f fr 64 56 ------ f clk 24 -------- × = f fr 64 53 ------ f clk 24 -------- × = f fr f clk 24 -------- = |
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