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ADP5587ACBZ-R7 Datasheet(PDF) 13 Page - Analog Devices |
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ADP5587ACBZ-R7 Datasheet(HTML) 13 Page - Analog Devices |
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13 / 24 page ![]() ADP5587 Rev. B | Page 13 of 24 275 Microsecond Interrupt Configuration The ADP5587 gives the user the flexibility of deasserting the interrupt for 275 μs while there is a pending event. When the INT_CFG bit in Register 0x01 is set, any attempt to clear the interrupt bit while the interrupt pin is already asserted results in a 275 μs deassertion. When the INT_CFG bit is cleared, the processor interrupt remains asserted if the host tries to clear the interrupt. This feature is particularly useful for software development and edge triggering applications. Debouncing The ADP5587 has a 275 μs debounce time for GPIOs configured as GPIs and rows in keypad scanning mode. The reset line always has a 275 μs debounce time. General-Purpose Outputs (GPOs) The ADP5587 allows the user to configure all or some of its GPIOs as GPOs. These GPOs can be used as extra enables for the host processor or simply as trigger outputs. When configured as an output (GPO), a digital buffer drives the pin to 0 V for a 0 and to VCC for a 1. To set any GPIO as a GPO, make sure that the corresponding bits in Register 0x1D through Register 0x1F are set for GPIO mode; then use Register 0x23 through Register 0x25 to set the corresponding bits for GPO mode. Power-On Reset For built-in power-up initialization for applications lacking a power-on reset signal, a reset pin, RST, allows the user to reset the registers to default values in the event of a brownout or other reset condition. Table 14. Device Configuration Keypad GPIO Matrix Active Pins Number of Keys Available GPIO Number of GPIOs 10 × 8 C0 to C9, R0 to R7 80 0 0 8 × 8 C0 to C7, R0 to R7 64 C8, C9 2 8 × 7 C0 to C7, R0 to R6 56 R7, C8, C9 3 8 × 6 C0 to C7, R0 to R5 48 R6, R7, C8, C9 4 8 × 5 C0 to C7, R0 to R4 40 R5 to R7, C8, C9 5 7 × 7 C0 to C6, R0 to R6 49 R7, C7 to C9 4 7 × 6 C0 to C6, R0 to R5 42 R6, R7, C7 to C9 5 7 × 5 C0 to C6, R0 to R4 35 R5 to R7, C7 to C9 6 6 × 6 C0 to C5, R0 to R5 36 R6, R7, C6 to C9 6 6 × 5 C0 to C5, R0 to R4 30 R5 to R7, C6 to C9 7 6 × 4 C0 to C5, R0 to R3 24 R4 to R7, C6 to C9 8 … … … … … 0 × 0 None 0 R0 to R7, C0 to C9 18 |
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