FX828 datasheet(10/34 Pages) CMLMICRO

10 / 34 page

CTCSS/DCS/SELCALL Processor

FX828

D/828/4

Write Only Register Description

GENERAL RESET (Hex address $01)

The reset command has no data attached to it.

It sets the device registers into the specific (all

powersaved) states as listed below:

HEX

ADDRESS

BIT 7

(D7)

BIT 6

(D6)

BIT 5

(D5)

BIT 4

(D4)

BIT 3

(D3)

BIT 2

(D2)

BIT 1

(D1)

BIT 0

D0)

SIGNALLING CONTROL

$80

SELCALL & SUB-AUDIO STATUS

$81

SIGNALLING SET-UP

$82

CTCSS TX / FAST RX FREQUENCY

(1)

$83

CTCSS TX / FAST RX FREQUENCY

(2)

RX TONE PROGRAM

(1)

$84

RX TONE PROGRAM

(2)

DCS BYTE 3

$85

DCS BYTE 2

$86

DCS BYTE 1

$87

GENERAL CONTROL

$88

AUDIO CONTROL

(1)

$8A

AUDIO CONTROL

(2)

GENERAL PURPOSE TIMER

$8B

SELCALL TX

(1)

$8D

SELCALL TX

(2)

IRQ MASK

$8E

IRQ FLAG

$8F

X = undefined

SIGNALLING CONTROL Register (Hex address $80)

This register is used to control the functions of the device as described below:

SUBAUDIO TX

ENABLE

(Bit 7)

Bit 7 should be set to “1” to enable the CTCSS/DCS subaudio transmitter. The

subaudio Tx type will depend on the state of the SUBAUDIO TX MODE (Bit 1

SIGNALLING SET-UP Register $82).

TONE DECODER

ENABLE

(Bit 6)

Bit 6 should be set to “1” to enable the CTCSS/Selcall tone decoder or the DCS

decoder. Note: See also Bit 0 for DCS decoder operation.

Bits 7 and 6 should not both be set to “1” when Bit 0 is set to “1” because the

DCS function is half-duplex only.

CTCSS FAST

DETECT ENABLE

(Bit 5)

When this bit is "1", the FAST CTCSS DETECT or FAST CTCSS PREDICTIVE

mode is enabled, depending upon the setting of FAST CTCSS MODE (Bit 3

SIGNALLING SET-UP Register, $82). When this bit is "0", both FAST CTCSS

DETECT and FAST CTCSS PREDICTIVE tone detectors are disabled.

SELCALL TX

ENABLE

(Bit 2)

When this bit is "1" the Selcall transmitter is enabled. When this bit is "0" the

Selcall transmitter is disabled and powersaved.

DCS RX ENABLE

(Bit 0)

When this bit is "1" and Bit 6 is “1”, the DCS decoder is enabled. When this bit

is "0" the DCS decoder is disabled.

The DCS decoder and the subaudio (CTCSS or DCS) transmitter should not be

enabled at the same time.

(Bits 4, 3, and 1)

Reserved for future use. These bits should be set to "0".

FX828 Datasheet(PDF) 10 Page - CML Microcircuits

FX828 Datasheet(HTML) 10 Page - CML Microcircuits

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34

Datasheet Download

Link URL