FX919AD2 datasheet(23/44 Pages) CMLMICRO

23 / 44 page

4-Level FSK Modem Data Pump

FX919A

D/919A/4

Control Register B5, B4: FSTOL - Frame Sync Tolerance

These two bits have no effect in transmit mode. In receive mode, they define the maximum number of

mismatches which will be allowed during a search for the Frame Sync pattern:

Mismatches allowed

Note: A single 'mismatch' is defined as the difference between two adjacent symbol levels, thus if the symbol

'+1' were expected, then received symbol values of '+3' and '-1' would count as 1 mismatch, a received symbol

value of '-3' would count as 2 mismatches. A setting of '4 mismatches' is recommended for normal use.

Control Register B3, B2: LEVRES - Level Measurement Modes

These two bits have no effect in transmit mode. In receive mode they set the 'normal' operating mode of the

received signal amplitude and dc offset measuring circuits (the automatic sequencing of an AQLEV command

may temporarily override the 'normal' setting).

Mode

Hold

Slow Peak Detect

Lossy Peak Detect

Clamp

In normal use the LEVRES bits should be set to 'Slow Peak Detect', the other modes are intended for special

test purposes or are invoked automatically during an AQLEV sequence.

In the 'Slow' and 'Lossy' Peak Detect modes the positive and negative excursions of the received signal (after

filtering) are measured by peak rectifiers driving the DOC1 and DOC2 capacitors, to establish the amplitude of

the signal and any dc offset wrt VBIAS . The peak rectifiers are disabled in 'Hold' mode.

In 'Clamp' mode the DOC1 and DOC2 pins are connected directly to the output of the circuit that normally

drives the peak detectors.

Control Register B1, B0: PLLBW - Phase-Locked Loop Modes

These two bits have no effect in transmit mode. In receive mode, they set the 'normal' bandwidth of the Rx

clock extraction Phase Locked Loop circuit. This setting will be temporarily overridden by the automatic

sequencing of an AQSC command.

PLL Mode

Hold

Narrow Bandwidth

Medium Bandwidth

Wide Bandwidth

FX919AD2 Datasheet(PDF) 23 Page - CML Microcircuits