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PJSOT05CFN3 Datasheet(PDF) 1 Page - Pan Jit International Inc. |
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PJSOT05CFN3 Datasheet(HTML) 1 Page - Pan Jit International Inc. |
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1 / 3 page ![]() PAGE . 1 REV.0.1-JUL.14.2009 PJSOT05CFN3 E.S.D. Dual Protection Diode Array This Dual Unidirectional ESD Protector Array family have been designed to protect sensitive equipment against ESD in high speed transmission buses, operating at 5V. This dual array offers an integrated solution to protect up to 2 data lines in a unidirectional mode or, 1 data line in a bi-directional mode, in application where the board space is a premium, in our DFN 3L package version. FEATURES • IEC61000-4-2 ESD 15kV air, 8kV Contact Compliance • Low Leakage Current,Maximum of 0.5 A at rated voltage • Maximum Capacitance of 10pF per device at 0Vdc 1MHz • Peak Power Dissipation of 20W 8/20 s Waveform • Pin to pin compatible with standard DFN 3L • In compliance with EU RoHS 2002/95/EC directives MECHANICAL DATA • Case: DFN 3L, Molded Plastic • Terminals: Solderable per MIL-STD-750, Method 2026 • Marking: AF MAXIMUM RATINGS (Per Device) Note : 1.Capacitance between pins 1 and 2 is half of the value, in a bi-directional configuration. ELECTRAICAL CHARACTERISTICS (Per Device)TJ=25oC 0.042(1.05) 0.037(0.95) 0.013(0.32) 0.008(0.22) 0.014(0.36) 0.013(0.32) 0.008(0.22) 0.002(0.05) MAX. DFN 3L DFN 3L Unit : inch(mm) Unit : inch(mm) Pa r a m e te r Symbol Value Units Peak Pulse Power (8/20 s Waveform) PPP 20 W Peak Pulse Current (8/20 s Waveform) I PPM 2A ESD Voltage (HBM Per MIL STD883C-Method 3015-6) VESD 20 kV Operating Temperature Range TJ -55 to +125 oC Storage Temperature Range TSTG -55 to +150 oC P a r a m e t e r S ym b o l Te s t Co nd itio n M IN. TYP. M A X . Unit s Reve rs e S ta nd- O f f Volt ag e V WRM -- - 5 . 0 V Re ve rs e B re a kd own Vo l ta g e V BR I BR=1 m A 6 .2 - 7 . 2 V Re ve rs e Le aka g e C urr e nt I R V R=5 V - - 0 . 5 A C lam p i ng Vo l tag e ( 8/20 s) V C I PP =2 A - - 1 0 V O f f S ta te Junc ti on C a pac i t anc e ( Note 1) C J 0V dc B i as f =1 M Hz b et ween p i n 1, 2 to 3 (Gnd ) -9 1 0 p F PAN JIT RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE 1 2 3 1 2 3 |
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