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DSPIC30F2010 Datasheet(PDF) 191 Page - Microchip Technology

Part # DSPIC30F2010
Description  16-bit Digital Signal Controllers
PDF  202 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

DSPIC30F2010 Datasheet(HTML) 191 Page - Microchip Technology

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© 2011 Microchip Technology Inc.
DS70118J-page 191
dsPIC30F2010
APPENDIX A:
REVISION HISTORY
Revision F (May 2006)
Previous versions of this data sheet contained
Advance or Preliminary Information. They were
distributed with incomplete characterization data.
This revision reflects these updates:
• Supported I2C Slave addresses
(see Table 16-1)
• 10-bit A/D High-speed Conversion timing
requirements (see Section 18.0 “10-bit High-
Speed Analog-to-Digital Converter (ADC)
Module”
• Operating Current (IDD) specifications
(see Table 22-5)
• Idle Current (IIDLE) specifications
(see Table 22-6)
• Power-down Current (IPD) specifications
(see Table 22-7)
• I/O pin Input specifications
(see Table 22-8)
• BOR voltage limits
(see Table 22-10)
• PLL Clock Timing specifications
(see Table 22-14)
• PLL Jitter specifications
(see Table 22-15)
• Internal RC Accuracy specifications
(see Table 22-17)
• Watchdog Timer time-out limits
(see Table 22-20)
• Additional minor corrections throughout
document.
Revision G (December 2006)
This revision includes updates to the packaging
diagrams.
Revision H (March 2008)
This revision reflects these updates:
• Changed the location of the input reference in the
10-bit High-Speed ADC Functional Block Diagram
(see Figure 18-1)
• Removed incorrect reference to LVDIN function
on Port B (see Figure 1-1), previously shown on
pin 4 of SDIP and SOIC packages and pin 1 of
QFN package (see Pin Diagrams)
• Removed erroneous reference to use of the Fast
RC Oscillator with the PLL (see Section 19.2.4
“Phase-Locked Loop (PLL)”)
• Added FUSE Configuration Register (FICD)
details (see Section 19.6 “Device Configuration
Registers” and Table 19-8)
• Electrical Specifications:
- Resolved TBD values for parameters DO10,
DO16, DO20, and DO26 (see Table 22-9)
- 10-bit High-Speed ADC tPDU timing parame-
ter (time to stabilize) has been updated from
20 µs typical to 20 µs maximum (see
Table 22-39)
- Parameter OS65 (Internal RC Accuracy) has
been expanded (see Table 22-18) to reflect
multiple Min and Max values for different tem-
peratures
- Parameter D134 (Erase/Write Cycle Time)
has been updated to include Min and Max
values and the Typ value has been removed
(see Table 22-11)
- Parameter DC12 (RAM Data Retention Volt-
age) has been updated to include a Min value
(see Table 22-4)
- Removed parameters OS62 (Internal FRC
Jitter) and OS64 (Internal FRC Drift) and
Note 2 from AC Characteristics (see
Table 22-17)
- Parameter OS63 (Internal FRC Accuracy)
has been expanded to reflect multiple Min
and Max values for different temperatures
(see Table 22-17)
- Updated Min and Max values and Conditions
for parameter SY11 and updated Min, Typ,
and Max values and Conditions for
parameter SY20 (see Table 22-20)
• Additional minor corrections throughout the
document



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