A.C. Characteristics

Ta=25

°C

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

Conditions

System Clock

5V

On-chip RC oscillator

24

32

40

kHz

System Clock

¾

External clock source

¾

32

¾

kHz

LCD Frame Frequency

5V

On-chip RC oscillator

48

64

80

Hz

LCD Frame Frequency

¾

External clock source

¾

64

¾

Hz

LCD Common Period

¾

n: Number of COM

¾

¾

sec

Serial Data Clock (WR Pin)

3V

Duty cycle 50%

4

¾

150

kHz

5V

4

¾

300

kHz

Serial Data Clock (RD Pin)

3V

Duty cycle 50%

¾¾

75

kHz

5V

¾¾

150

kHz

Serial Interface Reset Pulse Width

(Figure 3)

¾

CS

500

600

¾

ns

WR,RD Input Pulse Width

(Figure 1)

3V

Write mode

3.34

¾

125

ms

Read mode

6.67

¾¾

5V

Write mode

1.67

¾

125

ms

Read mode

3.34

¾¾

Rise or Fall Time Serial Data Clock

Width (Figure 1)

¾¾

¾

120

160

ns

Setup Time for DATA to WR,RD

Clock Width (Figure 2)

¾¾

60

120

¾

ns

Setup Time for CS to WR,RD

Clock Width (Figure 3)

¾¾

500

600

¾

ns

Hold Time for DATA to WR,RD

Clock Width (Figure 2)

¾¾

500

600

¾

ns

Hold Time for CS to WR,RD Clock

Width (Figure 3)

¾¾

50

100

¾

ns

Tone Frequency (2kHz)

5V

On-chip RC oscillator

1.5

2.0

2.5

kHz

Tone Frequency (4kHz)

3.0

4.0

5.0

kHz

¾

VDD drop down to 0V

20

¾¾

ms

¾¾

0.05

¾¾

V/ms

Delay Time after Reset (Figure 4)

¾¾

1

¾¾

ms

Note:

1. If the conditions of Power-on Reset timing are not satisfied in power On/Off sequence, the internal

Power-on Reset (POR) circuit will not operate normally.

2. If the VDD drops below the minimum voltage of operating voltage spec. during operating, the conditions

of Power-on Reset timing must be satisfied also. That is, the VDD must drop to 0V and keep at 0V for

20ms (min.) before rising to the normal operating voltage.

HT1626

Rev. 1.60

7

November 9, 2010

PATENTED