PIC12F752 datasheet(23/204 Pages) MICROCHIP

23 / 204 page

 2011 Microchip Technology Inc.

Preliminary

DS41576A-page 23

PIC12F752/HV752

2.2.2.6

PIR1 Register

The PIR1 register contains the Peripheral Interrupt flag

bits, as shown in Register 2-6.

Note:

Interrupt flag bits are set when an interrupt

condition occurs, regardless of the state of

its corresponding enable bit or the Global

Enable bit, GIE of the INTCON register.

User

software

should

ensure

the

appropriate interrupt flag bits are clear prior

to enabling an interrupt.

PIR1: PERIPHERAL INTERRUPT REQUEST REGISTER 1

R/W-0

U-0

R/W-0

TMR1GIF

ADIF

—

HLTMR1IF

TMR2IF

TMR1IF

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

TMR1GIF: TMR1 Gate Interrupt Flag bit

= Timer1 gate interrupt is pending

= Timer1 gate interrupt is not pending

bit 6

ADIF: ADC Interrupt Flag bit

= ADC conversion complete

= ADC conversion has not completed or has not been started

bit 5-3

Unimplemented: Read as ‘0’

bit 2

HLTMR1IF: Hardware Limit Timer1 to HLTPR1 Match Interrupt Flag bit

= HLTMR1 to HLTPR1 match occurred (must be cleared in software)

= HLTMR1 to HLTPR1 match did not occur

bit 1

TMR2IF: Timer2 to PR2 Match Interrupt Flag bit

= Timer2 to PR2 match occurred (must be cleared in software)

= Timer2 to PR2 match did not occur

bit 0

TMR1IF: Timer1 Interrupt Flag bit

= Timer1 rolled over (must be cleared in software)

= Timer1 has not rolled over

PIC12F752 Datasheet(PDF) 23 Page - Microchip Technology

PIC12F752 Datasheet(HTML) 23 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL