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ADRF6702 Datasheet(PDF) 4 Page - Analog Devices |
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ADRF6702 Datasheet(HTML) 4 Page - Analog Devices |
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4 / 36 page  ADRF6703 Rev. 0 | Page 4 of 36 Parameter Test Conditions/Comments Min Typ Max Unit REFERENCE CHARACTERISTICS REFIN, MUXOUT pins REFIN Input Frequency 12 160 MHz REFIN Input Capacitance 4 pF Phase Detector Frequency 20 40 MHz MUXOUT Output Level Low (lock detect output selected) 0.25 V High (lock detect output selected) 2.7 V MUXOUT Duty Cycle 50 % CHARGE PUMP Charge Pump Current Programmable to 250 μA, 500 μA, 750 μA, 1000 μA 500 μA Output Compliance Range 1 2.8 V PHASE NOISE (FREQUENCY = 2140 MHz, fPFD = 38.4 MHz) Closed loop operation (see Figure 35 for loop filter design) 10 kHz offset −105.3 dBc/Hz 100 kHz offset −103.1 dBc/Hz 1 MHz offset −127.9 dBc/Hz 10 MHz offset −149.7 dBc/Hz Integrated Phase Noise 1 kHz to 10 MHz integration bandwidth 0.29 °rms Reference Spurs fPFD/2 −110 dBc fPFD −102.0 dBc fPFD × 2 −87.2 dBc fPFD × 3 −90.4 dBc fPFD × 4 −98.4 dBc PHASE NOISE (FREQUENCY = 2300 MHz, fPFD = 38.4 MHz) Closed loop operation (see Figure 35 for loop filter design) 10 kHz offset −103.5 dBc/Hz 100 kHz offset −102.2 dBc/Hz 1 MHz offset −128.4 dBc/Hz 10 MHz offset −149.5 dBc/Hz Integrated Phase Noise 1 kHz to 10 MHz integration bandwidth 0.295 °rms Reference Spurs fPFD/2 −110.7 dBc fPFD −102.3 dBc fPFD × 2 −85.5 dBc fPFD × 3 −92.4 dBc fPFD × 4 −101.1 dBc PHASE NOISE (FREQUENCY = 2600 MHz, fPFD = 38.4 MHz) Closed loop operation (see Figure 35 for loop filter design) 10 kHz offset −98.8 dBc/Hz 100 kHz offset −100.2 dBc/Hz 1 MHz offset −129.2 dBc/Hz 10 MHz offset −151.0 dBc/Hz Integrated Phase Noise 1 kHz to 10 MHz integration bandwidth 0.37 °rms Reference Spurs fPFD/2 −110.6 dBc fPFD −106.5 dBc fPFD × 2 −88.6 dBc fPFD × 3 −92.4 dBc fPFD × 4 −102.5 dBc RF OUTPUT HARMONICS Measured at RFOUT, frequency = 2140 MHz Second harmonic −41 dBc Third harmonic −65 dBc LO INPUT/OUTPUT LOP, LON Output Frequency Range Divide by 2 circuit in LO path enabled 2100 2600 MHz Divide by 2 circuit in LO path disabled 4200 5200 MHz LO Output Level at 2140 MHz 2× LO or 1× LO mode, into a 50 Ω load, LO buffer enabled 0.1 dBm LO Input Level Externally applied 2× LO, PLL disabled 0 dBm LO Input Impedance Externally applied 2× LO, PLL disabled 50 Ω |
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