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TC1165 Datasheet(PDF) 30 Page - Infineon Technologies AG |
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TC1165 Datasheet(HTML) 30 Page - Infineon Technologies AG |
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30 / 133 page  TC1165/TC1166 Functional Description Preliminary Data Sheet 26 V1.0, 2008-04 • On-chip generation of programming voltage • JEDEC-standard based command sequences for PFLASH control – Write state machine controls programming and erase operations – Status and error reporting by status flags and interrupt • Margin check for detection of problematic PFLASH bits Features of Data Flash • 32 Kbyte on-chip data Flash memory, organized in two 16 Kbyte banks • Usable for data storage with EEPROM functionality • 128 Byte of program interface – 128 bytes are programmed into one DFLASH page by one step/command • 64-bit read interface (no burst transfers) • Dynamic correction of single-bit errors during read access • Detection of double-bit errors • Fixed sector architecture – Two 16 Kbyte banks/sectors – Each sector separately erasable • Configurable read protection (combined with write protection) for complete DFLASH together with PFLASH read protection • Password mechanism for temporary disabling of write and read protection • Erasing/programming of one bank possible while reading data from the other bank • Programming of one bank while erasing the other bank possible • On-chip generation of programming voltage • JEDEC-standard based command sequences for DFLASH control – Write state machine controls programming and erase operations – Status and error reporting by status flags and interrupt • Margin check for detection of problematic DFLASH bits |
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