Data Sheet

13

V2.1, 2007-06-20

TLE7188F

Description and Electrical Characteristics

When the TLE7188F is in INH mode (INH is low) or when the supply voltage is not available on the Vs pin, then

the driver IC is not supplied, the charge pumps are inactive and the charge pump capacitors are discharged. Pin

CB2 (+ terminal of buffer capacitor 2) will decay to GND. When the battery voltage is still applied to VDH (- terminal

of buffer capacitor 2) the buffer capacitor 2 will slowly charged to battery voltage, yet with reversed polarity

compared to the polarity during regular operation. Hence, it is important to use a buffer capacitor 2 (CB2) that can

dump during INH mode, the negative voltage across CB2 will be clamped to -31 V (CB2 referenced to VDH).

5.1.4

Electrical Characteristics

Electrical Characteristics MOSFET drivers - DC Characteristics

V

(unless otherwise specified)

Pos.

Parameter

Symbol

Limit Values

Unit

Conditions

Min.

Typ.

Max.

5.1.1

Low level output voltage

V

G_LL

––0.2

V

I=30mA

5.1.2

High level output voltage, Low Side

V

G_HL

7.5

–

13

V

Vs=5.5..8V;

I=-2mA

5.1.3

High level output voltage, High Side

V

G_HL

6.5

–

13

V

Vs=5.5..8V;

I=-2mA

5.1.4

High level output voltage

V

G_HL

9–13

V

Vs=8..20V;

I=-2mA

5.1.5

High level output voltage difference

d

VG_H

––1.0

V

I=-100mA; Vs=20V

5.1.6

Gate drive output voltage

V

GS1_D

–

–

0.2

V

Disabled;

5.5V<Vs<28V;

I=10mA

5.1.7

Gate drive output voltage

Tj=-40°C

Tj=25°C

Tj=150°C

V

GS2_5

–

–

–

–

–

–

1.4

1.2

1.0

V

UVLO; Vs<=5.5V

5.1.8

Gate drive output voltage high side

Tj=-40°C

Tj=25°C

Tj=150°C

V

GS3_5

–

–

–

–

–

–

–

1.4

1.2

1.0

VOver voltage

5.1.9

Gate drive output voltage low side

V

GS_5

––0.2

V

Over voltage

5.1.10

Low level input voltage of Ixx, ENA

V

I_LL

––1.0

V

–

5.1.11

High level input voltage of Ixx, ENA

V

I_HL

2.0

––V

–

5.1.12

Low level input voltage of INH

V

I_LL

––0.75

V

–

5.1.13

High level input voltage of INH

V

I_HL

2.1

––V

–

5.1.14

Input hysteresis of IHx, ILx, ENA

d

VI

50

–

–-

mV

Vs=5.5..8V

5.1.15

Input hysteresis of IHx, ILx, ENA

d

VI

100

200

–-

mV

Vs=8..20V

5.1.16

Output bias current SHx

I

SHx

-1.6

-1.0

-0.3

mA

Vs=5.5..20V;

5.1.17

Output bias current SLx

I

SLx

-1.6

-1.0

-0.3

mA

Vs=5.5..20V;