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MSP430F2011IPWR Datasheet(PDF) 50 Page - Texas Instruments |
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MSP430F2011IPWR Datasheet(HTML) 50 Page - Texas Instruments |
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50 / 91 page ![]() MSP430F20x3 MSP430F20x2 MSP430F20x1 SLAS491G – AUGUST 2005 – REVISED APRIL 2011 www.ti.com Table 17. Port P1 (P1.0 to P1.3) Pin Functions, MSP430F20x1 CONTROL BITS / SIGNALS(1) PIN NAME (P1.x) x FUNCTION P1DIR.x P1SEL.x CAPD.x P1.0(2) input/output 0/1 0 0 Timer_A2.TACLK/INCLK 0 1 0 P1.0/TACLK/ACLK/CA0 0 ACLK 1 1 0 CA0(3) X X 1 P1.1(2) input/output 0/1 0 0 Timer_A2.CCI0A 0 1 0 P1.1/TA0/CA1 1 Timer_A2.TA0 1 1 0 CA1(3) X X 1 P1.2(2) input/output 0/1 0 0 Timer_A2.CCI1A 0 1 0 P1.2/TA1/CA2 2 Timer_A2.TA1 1 1 0 CA2(3) X X 1 P1.3(2) input/output 0/1 0 0 N/A 0 1 0 P1.3/CAOUT/CA3 3 CAOUT 1 1 0 CA3(3) X X 1 (1) X = Don 't care (2) Default after reset (PUC/POR) (3) Setting the CAPD.x bit disables the output driver as well as the input Schmitt trigger to prevent parasitic cross currents when applying analog signals. Selecting the CAx input pin to the comparator multiplexer with the P2CAx bits automatically disables the input buffer for that pin, regardless of the state of the associated CAPD.x bit. 50 Copyright © 2005–2011, Texas Instruments Incorporated |
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