MSP430F5437AIPN datasheet(2/104 Pages) TI

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MSP430F543xA, MSP430F541xA

SLAS655B – JANUARY 2010 – REVISED OCTOBER 2010

www.ti.com

DESCRIPTION

The Texas Instruments MSP430 family of ultralow-power microcontrollers consists of several devices featuring

different sets of peripherals targeted for various applications. The architecture, combined with extensive

low-power modes, is optimized to achieve extended battery life in portable measurement applications. The

device features a powerful 16-bit RISC CPU, 16-bit registers, and constant generators that contribute to

maximum code efficiency. The digitally controlled oscillator (DCO) allows wake-up from low-power modes to

active mode in less than 5 µs.

The MSP430F543xA and MSP430F541xA series are microcontroller configurations with three 16-bit timers, a

high performance 12-bit analog-to-digital (A/D) converter, up to four universal serial communication interfaces

(USCI), hardware multiplier, DMA, real-time clock module with alarm capabilities, and up to 87 I/O pins.

Typical applications for this device include analog and digital sensor systems, digital motor control, remote

controls, thermostats, digital timers, hand-held meters, etc.

Family members available are summarized in Table 1.

Table 1. Family Members

USCI

Flash

SRAM

ADC12_A

Package

Channel A:

Channel B:

Device

Timer_A(1)

Timer_B(2)

I/O

(KB)

(Ch)

Type

UART/IrDA/

SPI/I2C

SPI

100 PZ,

MSP430F5438A

256

5, 3

14 ext / 2 int

113 ZQW

MSP430F5437A

256

5, 3

14 ext / 2 int

80 PN

100 PZ,

MSP430F5436A

192

5, 3

14 ext / 2 int

113 ZQW

MSP430F5435A

192

5, 3

14 ext / 2 int

80 PN

100 PZ,

MSP430F5419A

128

5, 3

14 ext / 2 int

113 ZQW

MSP430F5418A

128

5, 3

14 ext / 2 int

80 PN

(1)

Each number in the sequence represents an instantiation of Timer_A with its associated number of capture compare registers and PWM

output generators available. For example, a number sequence of 3, 5 would represent two instantiations of Timer_A, the first

instantiation having 3 and the second instantiation having 5 capture compare registers and PWM output generators, respectively.

(2)

Each number in the sequence represents an instantiation of Timer_B with its associated number of capture compare registers and PWM

output generators available. For example, a number sequence of 3, 5 would represent two instantiations of Timer_B, the first

instantiation having 3 and the second instantiation having 5 capture compare registers and PWM output generators, respectively.

Table 2. Ordering Information(1)

PACKAGED DEVICES(2)

PLASTIC 100-PIN LQFP

PLASTIC 80-PIN LQFP

PLASTIC 113-BALL BGA

(PZ)

(PN)

(ZQW)

MSP430F5438AIPZ

MSP430F5437AIPN

MSP430F5438AIZQW

–40°C to 85°C

MSP430F5436AIPZ

MSP430F5435AIPN

MSP430F5436AIZQW

MSP430F5419AIPZ

MSP430F5418AIPN

MSP430F5419AIZQW

(1)

For the most current package and ordering information, see the Package Option Addendum at the end

of this document, or see the TI web site at www.ti.com.

(2)

Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.

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