MSP430F413IPM datasheet(23/64 Pages) TI

23 / 64 page

MSP430x41x

MIXED SIGNAL MICROCONTROLLER

SLAS340J − MAY 2001 − REVISED DECEMBER 2008

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

electrical characteristics over recommended operating free-air temperature (unless otherwise

noted) (continued)

Schmitt-trigger inputs − ports P1, P2, P3, P4, P5, and P6

PARAMETER

VCC

MIN

MAX

UNIT

Positive going input threshold voltage

2.2 V

1.1

1.5

VIT+

Positive-going input threshold voltage

3 V

1.5

1.9

Negative going input threshold voltage

2.2 V

0.4

0.9

VIT−

Negative-going input threshold voltage

3 V

0.9

1.3

Input voltage hysteresis (V

)

2.2 V

0.3

1.1

Vhys

Input voltage hysteresis (VIT+ − VIT−)

3 V

0.45

standard inputs − RST/NMI, JTAG (TCK, TMS, TDI/TCLK, TDO/TDI)

PARAMETER

VCC

MIN

MAX

UNIT

VIL

Low-level input voltage

2 2 V/3 V

VSS

VSS+0.6

VIH

High-level input voltage

2.2 V/3 V

0.8

×VCC

VCC

inputs Px.x, TAx/TAx.x

PARAMETER

TEST CONDITIONS

VCC

MIN

MAX

UNIT

Port P1, P2: P1.x to P2.x, External

2.2 V/3 V

1.5

cycle

t(int)

External interrupt timing

Port P1, P2: P1.x to P2.x, External

trigger signal for the interrupt flag

)

2.2 V

(int)

(see Note 1)

3 V

t()

Timer A capture timing

TAx/TAx y

2.2 V

t(cap)

Timer_A, capture timing

TAx/TAx.y

3 V

Timer_A clock frequency externally applied

TACLK/TAxCLK INCLK t

2.2 V

MHz

f(TAext)

Timer_A clock frequency externally applied

to pin

TACLK/TAxCLK, INCLK t(H) = t(L)

3 V

MHz

Timer A clock frequency

SMCLK or ACLK signal selected

2.2 V

MHz

f(TAint)

Timer_A clock frequency

SMCLK or ACLK signal selected

3 V

MHz

NOTES:

1. The external signal sets the interrupt flag every time the minimum t(int) cycle and time parameters are met. It may be set even with

trigger signals shorter than t(int). Both the cycle and timing specifications must be met to ensure the flag is set. t(int) is measured in

MCLK cycles.

leakage current (see Note 1)

PARAMETER

TEST CONDITIONS

VCC

MIN

MAX

UNIT

Ilkg(P1.x)

Port P1

V(P1.x) (see Note 2)

±50

Ilkg(P2.x)

Port P2

V(P2.x) (see Note 2)

±50

Ilkg(P3.x)

Leakage current

Port P3

V(P3.x) (see Note 2)

2 2 V/3 V

±50

Ilkg(P4.x)

Leakage current

Port P4

V(P4.x) (see Note 2)

2.2 V/3 V

±50

Ilkg(P5.x)

Port P5

V(P5.x) (see Note 2)

±50

Ilkg(P6.x)

Port P6

V(P6.x) (see Note 2)

±50

NOTES:

1. The leakage current is measured with VSS or VCC applied to the corresponding pin(s), unless otherwise noted.

2. The port pin must be selected as an input.

MSP430F413IPM Datasheet(PDF) 23 Page - Texas Instruments

MSP430F413IPM Datasheet(HTML) 23 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64

Datasheet Download

Link URL