SYSTEM-1

SYSTEM-2

1

2

3

4

8

7

6

5

DIR CTRL

I/O-1

Pullup/Down

I/O-2

Pullup/Down

SN74LVC2T45-EP

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SCES777C – NOVEMBER 2008 – REVISED JULY 2010

APPLICATION INFORMATION

Figure 4 shows the SN74LVC2T45 being used in a bidirectional logic level-shifting application. Since the

SN74LVC2T45 does not have an output-enable (OE) pin, the system designer should take precautions to avoid

bus contention between SYSTEM-1 and SYSTEM-2 when changing directions.

The following table shows data transmission from SYSTEM-1 to SYSTEM-2 and then from SYSTEM-2 to

SYSTEM-1.

STATE

DIR CTRL

I/O-1

I/O-2

DESCRIPTION

1

H

Out

In

SYSTEM-1 data to SYSTEM-2

SYSTEM-2 is getting ready to send data to SYSTEM-1. I/O-1 and I/O-2 are disabled. The

2

H

Hi-Z

Hi-Z

DIR bit is flipped. I/O-1 and I/O-2 still are disabled. The bus-line state depends on pullup or

3

L

Hi-Z

Hi-Z

4

L

In

Out

SYSTEM-2 data to SYSTEM-1

(1)

SYSTEM-1 and SYSTEM-2 must use the same conditions, i.e., both pullup or both pulldown.

Figure 4. Bidirectional Logic Level-Shifting Application

Enable Times

Calculate the enable times for the SN74LVC2T45 using the following formulas:

•

•

•

•

In a bidirectional application, these enable times provide the maximum delay from the time the DIR bit is

switched until an output is expected. For example, if the SN74LVC2T45 initially is transmitting from A to B, then

the DIR bit is switched; the B port of the device must be disabled before presenting it with an input. After the B

port has been disabled, an input signal applied to it appears on the corresponding A port after the specified

propagation delay.

Copyright © 2008–2010, Texas Instruments Incorporated

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