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DS1245AB Datasheet(PDF) 9 Page - Dallas Semiconductor |
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DS1245AB Datasheet(HTML) 9 Page - Dallas Semiconductor |
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9 / 10 page ![]() DS1245Y/AB 9 of 10 13. tWR1 and tDH1 are measured from WE going high. 14. tWR2 and tDH2 are measured from CE going high. 15. DS1245 modules are recognized by Underwriters Laboratories (UL) under file E99151. DC TEST CONDITIONS AC TEST CONDITIONS Outputs Open Output Load: 100 pF + 1TTL Gate Cycle = 200 ns for operating current Input Pulse Levels: 0 - 3.0V All voltages are referenced to ground Timing Measurement Reference Levels Input: 1.5V Output: 1.5V Input pulse Rise and Fall Times: 5 ns ORDERING INFORMATION PART TEMP RANGE SUPPLY TOLERANCE PIN-PACKAGE SPEED GRADE (ns) DS1245AB-70+ 0°C to +70°C 5V ± 5% 32 740 EDIP 70 DS1245ABP-70+ 0°C to +70°C 5V ± 5% 34 PowerCap* 70 DS1245AB-70IND+ -40°C to +85°C 5V ± 5% 32 740 EDIP 70 DS1245ABP-70IND+ -40°C to +85°C 5V ± 5% 34 PowerCap* 70 DS1245Y-70+ 0°C to +70°C 5V ± 10% 32 740 EDIP 70 DS1245YP-70+ 0°C to +70°C 5V ± 10% 34 PowerCap* 70 DS1245Y-70IND+ -40°C to +85°C 5V ± 10% 32 740 EDIP 70 DS1245YP-70IND+ -40°C to +85°C 5V ± 10% 34 PowerCap* 70 +Denotes a lead(Pb)-free/RoHS-compliant package. *DS9034PC+ or DS9034PCI+ (PowerCap) required. Must be ordered separately. PACKAGE INFORMATION For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO. 32 EDIP MDT32+6 21-0245 — 34 PCAP PC2+3 21-0246 — |
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