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TUSB9261 Datasheet(PDF) 18 Page - Texas Instruments

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Part # TUSB9261
Description  USB 3.0 TO SATA BRIDGE
PDF  24 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TUSB9261 Datasheet(HTML) 18 Page - Texas Instruments

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TUSB9261
SLLSE67B
– MARCH 2011 – REVISED MAY 2011
www.ti.com
7
ELECTRICAL SPECIFICATIONS
7.1
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
VALUE
UNIT
VDD
Steady-state supply voltage
–0.3 to 1.4
V
VDD33/
Steady-state supply voltage
–0.3 to 3.8
V
VDDA33
7.2
Thermal Information
TUSB9261
THERMAL METRIC
PVP
UNITS
64 PINS
θJA
Junction-to-ambient thermal resistance(1)
30.2
θJCtop
Junction-to-case (top) thermal resistance(2)
11.0
θJB
Junction-to-board thermal resistance(3)
6.1
°C/W
ψJT
Junction-to-top characterization parameter(4)
0.4
ψJB
Junction-to-board characterization parameter(5)
6.1
θJCbot
Junction-to-case (bottom) thermal resistance(6)
0.9
(1)
The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(2)
The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific
JEDEC-standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(3)
The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(4)
The junction-to-top characterization parameter,
ψJT, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining
θJA, using a procedure described in JESD51-2a (sections 6 and 7).
(5)
The junction-to-board characterization parameter,
ψJB, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining
θJA , using a procedure described in JESD51-2a (sections 6 and 7).
(6)
The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific
JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
7.3
Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VDD
Digital 1.1 supply voltage
1.045
1.1
1.155
V
VDD33
Digital 3.3 supply voltage
3
3.3
3.6
V
VDDA33
Analog 3.3 supply voltage
3
3.3
3.6
V
VBUS
Voltage at VBUS PAD
0
1.155
V
TA
Operating free-air temperature range
-40
85
°C
TJ
Operating junction temperature range
-40
100
°C
HBM ESD
2000
V
CDM ESD
500
V
18
ELECTRICAL SPECIFICATIONS
Copyright
© 2011, Texas Instruments Incorporated
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