HT82B60R datasheet(39/70 Pages) HOLTEK

39 / 70 page

HT82B60R

Rev. 1.10

February 1, 2011

The SIMDR register is used to store the data being trans-

mitted and received. The same register is used by both

the SPI and I

2C functions. Before the microcontroller

writes data to the SPI bus, the actual data to be transmit-

ted must be placed in the SIMDR register. After the data

is received from the SPI bus, the microcontroller can read

it from the SIMDR register. Any transmission or reception

of data from the SPI bus must be made via the SIMDR

Bit

76543210

Label SD7 SD6 SD5 SD4 SD3 SD2 SD1 SD0

R/W

R/W R/W R/W R/W R/W R/W R/W R/W

POR

XXXXXXXX

There are also two control registers for the SPI inter-

face, SIMCTL0 and SIMCTL2. Note that the SIMCTL2

2C function. The SIMCTL1 register is not used by the

SPI function, only by the I

2C function. Register SIMCTL0

is used to control the enable/disable function and to set

the data transmission clock frequency. Although not

connected with the SPI function, the SIMCTL0 register

is also used to control the Peripheral Clock prescaler.

such as LSB/MSB selection, write collision flag etc.

The following gives further explanation of each

SIMCTL0 register bit:

· SIMEN

The bit is the overall on/off control for the SPI inter-

face. When the SIMEN bit is cleared to zero to disable

the SPI interface, the SDI, SDO, SCK and SCS lines

will be in a I/O mode and the SPI operating current will

be reduced to a minimum value. When the bit is high

the SPI interface is enabled. The SIM configuration

option must have first enabled the SIM interface for

this bit to be effective. Note that when the SIMEN bit

changes from low to high the contents of the SPI con-

trol registers will be in an unknown condition and

should therefore be first initialised by the application

program.

· SIM0~SIM2

These bits setup the overall operating mode of the

SIM function. As well as selecting if the I

2CorSPI

function, they are used to control the SPI Mas-

ter/Slave selection and the SPI Master clock fre-

quency. If the SPI Slave Mode is selected then the

clock will be supplied by an external Master device.

SIM0

SIM1

SIM2

SPI Master/Slave Clock

Control and I2C Enable

SPI Master, f

SYS/4

SPI Master, f

SYS/16

SPI Master, f

SYS/64

SPI Master, f

SYS

SPI Master, f

SYS/2

SPI Slave

110

2C mode

Not used

SPI Control Register

- SIMCTL2

The SIMCTL2 register is also used by the I

2C interface

but has the name SIMAR.

· TRF

The TRF bit is the Transmit/Receive Complete flag and

is set high automatically when an SPI data transmis-

sion is completed, but must be cleared by the applica-

tion program. It can be used to generate an interrupt.

· WCOL

The WCOL bit is used to detect if a data collision has

occurred. If this bit is high it means that data has been

attempted to be written to the SIMDR register during a

data transfer operation. This writing operation will be

ignored if data is being transferred. The bit can be

cleared by the application program. Note that using

the WCOL bit can be disabled or enabled via configu-

ration option.

· CSEN

The CSEN bit is used as an on/off control for the SCS

pin. If this bit is low then the SCS pin will be disabled

and placed into I/O mode. If the bit is high the SCS pin

will be enabled and used as a select pin. Note that us-

ing the CSEN bit can be disabled or enabled via con-

figuration option.

· MLS

This is the data shift select bit and is used to select

how the data is transferred, either MSB or LSB first.

Setting the bit high will select MSB first and low for

LSB first.

· CKEG and CKPOL

These two bits are used to setup the way that the

clock signal outputs and inputs data on the SPI bus.

These two bits must be configured before data trans-

fer is executed otherwise an erroneous clock edge

HT82B60R Datasheet(PDF) 39 Page - Holtek Semiconductor Inc

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