1680C—08/26/10

9FG830

Eight Output Differential Frequency Generator for PCIe Gen3 and QPI

4

Pin Description (Continued)

31

VDD

PWR

Power supply, nominal 3.3V

32

DIF_2#

OUT

0.7V differential Complementary clock output

33

DIF_2

OUT

0.7V differential true clock output

34

^OE_2

IN

Active high input for enabling output 2. This pin has in internal 120kohm pull up

resistor.

0 = disable outputs, 1= enable outputs

35

GND

PWR

Ground pin.

36

VDD

PWR

Power supply, nominal 3.3V

37

^OE_1

IN

Active high input for enabling output 1. This pin has an internal 120kohm pull up

resistor.

0 = disable outputs, 1= enable outputs

38

DIF_1#

OUT

0.7V differential Complementary clock output

39

DIF_1

OUT

0.7V differential true clock output

40

VDD

PWR

Power supply, nominal 3.3V

41

DIF_0#

OUT

0.7V differential Complementary clock output

42

DIF_0

OUT

0.7V differential true clock output

43

vOE_0

IN

Active high input for enabling output 0. This pin has an internal 120kohm pull down

resistor.

0 =disable outputs, 1= enable outputs

44

vFS1

IN

3.3V Frequency select latched input pin with internal 120kohm pull down resistor.

45

vFS0

IN

3.3V Frequency select latched input pin with internal 120kohm pull down resistor.

46

IREF

OUT

This pin establishes the reference current for the differential current-mode output pairs.

This pin requires a fixed precision resistor tied to ground in order to establish the

appropriate current. 475 ohms is the standard value.

47

GNDA

PWR

Ground pin for the PLL core.

48

VDDA

PWR

3.3V power for the PLL core.

Note:

^ indicates internal 120K pull up

v indicates internal 120K pull down