6

HV9801A

Supertex inc.

1235 Bordeaux Drive, Sunnyvale, CA 94089

Tel: 408-222-8888

www.supertex.com

Without the extended off-time the inductor current increases

with every switching cycle, thereby causing over-current

damage to the converter.

The extension of the off-time can be observed in Fig.2:

Fig.2. Short-circuit inductor current.

Leading Edge Blanking

The MOSFET drain current, and thereby the current sense

signal, exhibits a spike at the start of a switching cycle which

arises from the MOSFET gate charging current and the

current required for discharge of the MOSFET drain node.

These two currents typically exceed the inductor by quite a

margin.

The current sense signal is blanked at the start of the switch-

ing cycle in order to avoid a premature trigger of the current

sense and the short circuit protection comparators.

VDD Regulator

The VDD regulator generates a source of regulated voltage

for operation of internal and external circuits from the power

applied at the VIN pin. Alternatively, the VDD voltage can be

supplied from a source directly connected to the VDD pin.

The VDD regulator will turn off.

Switch Dimming

General

Lamp brightness can be adjusted to one of four discrete lev-

els by rapidly cycling power with the light switch. The bright-

ness levels are traversed in an up and down manner, the

levels being 100%, 50%, 25% and 12.5%. Brightness re-

sumes at the highest level when power is removed for more

than a second.

Reduction of LED current is accomplished through PWM

dimming with a PWM dimming frequency of about 1kHz. The

PWM frequency is generated by an internal oscillator and

the duty cycle by means of digital logic.

Turning the light switch off and on within one second ad-

justs LED current to the next higher or lower level, see the

illustration below. The sequence starts at 100% and adjusts

to a lower level with the following step. Upon reaching the

highest or lowest level the direction of the sequence revers-

es. When power is removed for more than one second, the

dimming sequence is terminated and brightness is reset to

100% upon turn-on of the light switch.

VDD Capacitor

The VDD voltage should be maintained for at least one sec-

ond and above the 3.5V level after loss of VIN power to allow

certain timing circuits to function.

The minimum required capacitance can be calculated from:

(C) • (ΔV) = (I) • (ΔT)

(C

With 700µA of I

175µF.

Detection of Power Cycling

The presence of AC line power is detected at the VIN pin. To

this end, loss of AC power should result in a rapidly falling

voltage at the output of the bridge rectifier.

The V

regulator. In order to facilitate a quick fall of the voltage, a

diode should be added to isolate the bus capacitor from the

VIN pin as shown in the Typical Application Circuit.

Fig.3. LED brightness and AC line power.

~750µs

440mV/R

CS

S

ON/OFF cycle time 1second (max.)

100%

50%

25%12.5% 25%

100%

Brightness

AC Line Power

ON