LC72121MA

No.A2009-13/24

1.Serial Data Input (IN1/IN2) tSU, tHD, tES, tEH, ≥ 0.75μs tLC < 0.75μs

(1) CL: Normally high

(2) CL: Normally low

2.Serial Data Output (Out) tSU, tHD, tEL, tES, tEH, ≥ 0.75μs tDC, tDH < 0.35μs

(1) CL: Normally high

(2) CL: Normally low

Note: The data conversion times (tDC and tDH) depend on the value of the pull-up resistor and the printed circuit board

capacitance since the DO pin is an n-channel open-drain circuit.

Internal data

tLC

tEH

tES

tEL

tHD

tSU

R3

R2

R1

P3

P2

P1

P0

A3

A2

A1

A0

B3

B2

B1

B0

R0

DI

CE

CL

Internal data

tLC

tEH

tES

tEL

tHD

tSU

R3

R2

R1

P3

P2

P1

P0

A3

A2

A1

A0

B3

B2

B1

B0

R0

DI

CE

CL

DO

DI

CE

CL

tDC

tDC

tDH

tEH

tES

tEL

tHD

tSU

UL

I1

I2

A3

A2

A1

A0

B3

B2

B1

B0

C0

C1

CE

C3

DO

tDC

tDC

tDH

tEH

tES

tEL

tHD

tSU

I1

I2

UL

A3

A2

A1

A0

B3

B2

B1

B0

C0

C1

C2

C3

DI

CE

CL