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SY89873L_0708 Datasheet(PDF) 2 Page - Micrel Semiconductor

Part # SY89873L_0708
Description  3.3V, 2.0GHz ANY DIFF. IN-TO-LVDS
PDF  11 Pages
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Manufacturer  MICREL [Micrel Semiconductor]
Direct Link  http://www.micrel.com
Logo MICREL - Micrel Semiconductor

SY89873L_0708 Datasheet(HTML) 2 Page - Micrel Semiconductor

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Precision Edge®
SY89873L
Micrel, Inc.
M9999-082407
hbwhelp@micrel.com or (408) 955-1690
PACKAGE/ORDERING INFORMATION
Pin Number
Pin Name
Pin Function
1, 2, 3, 4
QB0, /QB0
Differential Buffered Output Clocks: Divide by 2, 4, 8, 16.
QB1, /QB1
LVDS compatible.
5, 6
QA, /QA
Differential Buffered Undivided Output Clock: LVDS compatible.
7, 14
VCC
Positive Power Supply: Bypass with 0.1µF//0.01µF low ESR capacitors.
8
/RESET,
TTL/CMOS Compatible Output Reset and Disable: Internal 25kΩ pull-up. Input threshold
/DISABLE
is VCC/2. Logic LOW will reset the divider select, and align Bank A and Bank B edges. In
addition, when LOW, Banks A and B will be disabled.
12, 9
IN, /IN
Differential Input: Internal 50Ω termination resistors to VT input.
See
“Input Interface Applications” section.
10
VREF-AC
Reference Voltage: Equal to VCC–1.4V (approx.), and used for AC-coupled applications.
Maximum sink/source current is 0.5mA. See
“Input Interface Applications” section.
11
VT
Termination Center-Tap: For CML and LVDS inputs, leave this pin floating. Otherwise,
see
“Input Interface Applications” section.
13
GND
Ground: Exposed pad is internally connected to GND and must be connected to a ground
plane for proper thermal operation.
16, 15
S0, S1
Select Pins: LVTTL/CMOS logic levels. Internal 25kΩ pull-up resistor. Logic HIGH if left
unconnected (divided by 16 mode). S0 = LSB. Input threshold is VCC/2.
PIN DESCRIPTION
13
14
15
16
12
11
10
9
1
2
3
4
8
7
6
5
QB0
/QB0
QB1
/QB1
IN
VT
VREF-AC
/IN
16-Pin MLF® (MLF-16)
/RESET
S1
S0
Bank A Output
Bank B Outputs
/DISABLE
10
0
Input Clock
Input Clock ÷ 2
10
1
Input Clock
Input Clock ÷ 4
11
0
Input Clock
Input Clock ÷ 8
11
1
Input Clock
Input Clock ÷ 16
0X
X
QA = LOW, /QA = HIGH(1)
QB0 = LOW, /QB0 = HIGH(2)
QB1 = LOW, /QB1 = HIGH(2)
Notes:
1. On the next negative transition of the input signal.
2. Asynchronous Reset/Disable function. See
"Timing Diagram."
TRUTH TABLE
Ordering Information(1)
Package
Operating
Package
Lead
Part Number
Type
Range
Marking
Finish
SY89873LMI
MLF-16
Industrial
873L
Sn-Pb
SY89873LMITR(2)
MLF-16
Industrial
873L
Sb-Pb
SY89873LMG(3)
MLF-16
Industrial
873L with
NiPdAu
Pb-Free bar line indicator
Pb-Free
SY89873LMGTR(2, 3)
MLF-16
Industrial
873L with
NiPdAu
Pb-Free bar line indicator
Pb-Free
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
A = 25°C, DC Electricals only.
2. Tape and Reel.
3. Pb-Free package is recommended for new designs.



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