AD9737ABBCZRL datasheet(7/64 Pages) AD

7 / 64 page

Data Sheet

AD9737A/AD9739A

Rev.

| Page 7 of 64

AC SPECIFICATIONS

VDDA = VDD33 = 3.3 V, VDDC = VDD = 1.8 V, IOUTFS = 20 mA, fDAC = 2400 MSPS, unless otherwise noted.

Table 4.

AD9737A

AD9739A

Parameter

Min

Typ

Max

Min

Typ

Max

Unit

DYNAMIC PERFORMANCE

DAC Clock Rate

1600

2500

1600

2500

MSPS

Adjusted DAC Update Rate1

1600

2500

1600

2500

MSPS

Output Settling Time to 0.1%

SPURIOUS-FREE DYNAMIC RANGE (SFDR)

fOUT = 100 MHz

dBc

fOUT = 350 MHz

dBc

fOUT = 550 MHz

dBc

fOUT = 950 MHz

dBc

TWO-TONE INTERMODULATION DISTORTION (IMD),

fOUT2 = fOUT1 + 1.25 MHz

fOUT = 100 MHz

dBc

fOUT = 350 MHz

dBc

fOUT = 550 MHz

dBc

fOUT = 950 MHz

dBc

NOISE SPECTRAL DENSITY (NSD), 0 dBFS SINGLE TONE

fOUT = 100 MHz

−162

−167

dBm/Hz

fOUT = 350 MHz

−162

−166

dBm/Hz

fOUT = 550 MHz

−161

−164

dBm/Hz

fOUT = 850 MHz

−161

−163

dBm/Hz

WCDMA ACLR (SINGLE CARRIER), ADJACENT/ALTERNATE

ADJACENT CHANNEL

fDAC = 2457.6 MSPS, fOUT = 350 MHz

80/81

80/80

dBc

fDAC = 2457.6 MSPS, fOUT = 950 MHz

75/75

78/79

dBc

fDAC = 2457.6 MSPS, fOUT = 1700 MHz (Mix-Mode)

69/71

74/74

dBc

fDAC = 2457.6 MSPS, fOUT = 2100 MHz (Mix-Mode)

66/67

69/72

dBc

1 Adjusted DAC updated rate is calculated as fDAC divided by the minimum required interpolation factor. For the AD9737A/AD9739A, the minimum interpolation factor

is 1. Thus, with fDAC = 2500 MSPS, fDAC, adjusted, = 2500 MSPS.

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