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AS8650A Datasheet(PDF) 35 Page - ams AG

Part # AS8650A
Description  High-efficient Power Management Device with High-speed CAN Interface
PDF  46 Pages
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Manufacturer  AMSCO [ams AG]
Direct Link  http://www.ams.com
Logo AMSCO - ams AG

AS8650A Datasheet(HTML) 35 Page - ams AG

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AS8650A
Datasheet - Application In form atio n
8.2 Inter-Integrated Circuit (I²C) Interface
I²C is a bidirectional 2 line bus interface with a serial data line (SDA) and a serial clock line (SCLK) for inter IC control. This interface is only slave
interface and only microcontroller can start and stop the I²C operation. The overview of I²C protocol is shown in Figure 22. A HIGH to LOW
transition on SDA line while SCLK is HIGH is the START (S) condition and a LOW to HIGH transition on SDA line while SCLK is HIGH is the
STOP (P) condition, as shown in Figure 22. The START and STOP conditions should always be generated by the microcontroller. After the
START condition, microcontroller has to make sure that data on SDA line must be stable during the HIGH period of SCLK. The data should only
change when SCLK line is LOW. The Bus is busy after the START condition and it is free after the STOP condition. Any number of data bytes
can be transmitted between START and STOP. Each byte is followed by an acknowledgement (which is the ninth bit). The data transmitter
always receives an acknowledgement from the data receiver at end of each byte. The data transmitter releases the SDA bus at start of LOW
period of 8th clock pulse and data receiver acknowledges by pulling the SDA to LOW during the LOW period of the SCLK. The Data receiver
releases the bus at start of LOW period of 9th clock pulse of the SCLK and data transmitter gets the data bus.The AS8650A does not support
general call address, START byte and high-speed mode.
Figure 22. I²C Bus Protocol
8.2.1 I²C Write Operation
After the START condition, microcontroller has to send, in the first byte, the 7-bit slave address and 0 into the R/W bit as shown in Figure 23. The
microcontroller has to send the address of the register to be written in the second byte. The first 3 MSB bits are reserved and remaining 5 bits are
used as address bits. The data is sent starting from MSB to LSB. The AS8650A sends acknowledgement on 9
th clock pulse. In the next byte (3rd
byte) microcontroller has to send the data to be written into addressed register. If it is a single write operation, after receiving the
acknowledgment from AS8650A, microcontroller has to send START or STOP condition, as shown in Figure 23. In case of auto increment write
operation, microcontroller should not generate START or STOP condition after the third byte. If microcontroller continuously writes then address
pointer rolls back to the starting register address after reaching the last register address. Data bytes coming from the microcontroller are written
at the consecutive address locations, starting from the address sent in first data byte. After each data byte, direction of the bus line changes and
AS8650A acknowledges by pulling the SDA line LOW. To terminate the write operation microcontroller has to generate STOP or repeated
START condition. For details, see Figure 24.
Figure 23. I²C Write Operation
SDA
S
12
8
9
SCLK
MSB
ACK
34
56
7
12
8
9
34
56
7
R/W
7 bit Slave address
LSB
8 bit Data
12
8
9
34
56
7
S
or
P
8 bit Data
ACK
ACK
12
8
9
SCLK
MSB
SDA
34
56
7
12
8
9
34
56
7
LSB
12
8
9
34
56
7
A
AA
acknowledge
from slave
acknowledge
from slave
acknowledge
from slave
register address
data to register
S
or
P
R/W
Slave address
S
A0
A1
A2
A3
A4



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