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LTC3787

3787fc

APPLICATIONS INFORMATION

Power MOSFET Selection

Two external power MOSFETs must be selected for each

controller in the LTC3787: one N-channel MOSFET for the

bottom (main) switch, and one N-channel MOSFET for the

top (synchronous) switch.

The peak-to-peak gate drive levels are set by the INTVCC

voltage. This voltage is typically 5.4V during start-up

(see EXTVCC pin connection). Consequently, logic-level

threshold MOSFETs must be used in most applications.

Pay close attention to the BVDSS specification for the

MOSFETs as well; many of the logic level MOSFETs are

limited to 30V or less.

Selection criteria for the power MOSFETs include the

on-resistance RDS(ON), Miller capacitance CMILLER, input

voltage and maximum output current. Miller capacitance,

CMILLER, can be approximated from the gate charge curve

usually provided on the MOSFET manufacturer’s data

sheet. CMILLER is equal to the increase in gate charge

along the horizontal axis while the curve is approximately

flat divided by the specified change in VDS. This result

is then multiplied by the ratio of the application applied

VDS to the gate charge curve specified VDS. When the IC

is operating in continuous mode, the duty cycles for the

top and bottom MOSFETs are given by:

Main Switch Duty Cycle

OUT − VIN

OUT

Synchronous Switch Duty Cycle

OUT

If the maximum output current is IOUT(MAX) and each chan-

nel takes one half of the total output current, the MOSFET

power dissipations in each channel at maximum output

current are given by:

MAIN =

OUT − VIN )VOUT

•

OUT(MAX)

⎛

⎝⎜

⎞

⎠⎟

•1

+δ

()

•R

DS(ON) + k• V

OUT •

OUT(MAX)

2• V

•C

MILLER •f

SYNC =

OUT

•

OUT(MAX)

⎛

⎝⎜

⎞

⎠⎟

•1

+δ

()•R

DS(ON)

where

δ is the temperature dependency of RDS(ON) (ap-

proximately 1Ω) is the effective driver resistance at the

MOSFET’s Miller threshold voltage. The constant k, which

accounts for the loss caused by reverse recovery current,

is inversely proportional to the gate drive current and has

an empirical value of 1.7.

Both MOSFETs have I2R losses while the bottom N-channel

equation includes an additional term for transition losses,

which are highest at low input voltages. For high VIN the

high current efficiency generally improves with larger

MOSFETs, while for low VIN the transition losses rapidly

increase to the point that the use of a higher RDS(ON)device

with lower CMILLER actually provides higher efficiency. The

synchronous MOSFET losses are greatest at high input

voltage when the bottom switch duty factor is low or dur-

ing overvoltage when the synchronous switch is on close

to 100% of the period.

The term (1+

δ) is generally given for a MOSFET in the

form of a normalized RDS(ON) vs Temperature curve, but

δ = 0.005/°C can be used as an approximation for low

voltage MOSFETs.

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