This Data Sheet may be revised by subsequent versions

©2004 Eon Silicon Solution, Inc.,

www.eonssi.com

or modifications due to changes in technical specifications.

4

EN71PL032A0A

Rev. A, Issue Date: 2010/11/15

Pin Description

Signal

Description

A20–A0

21 Address Inputs (Common)

DQ15–DQ0

16 Data Inputs/Outputs (Common)

CE1#f

Chip Enable 1 (Flash)

CE1#ps

Chip Enable 1 (pSRAM)

CE2ps

Chip Enable 2 (pSRAM)

OE#

Output Enable (Common)

WE#

Write Enable (Common)

RY/BY#

Ready/Busy Output (Flash)

UB#

Upper Byte Control (pSRAM)

LB#

Lower Byte Control (pSRAM)

RESET#

Hardware Reset Pin, Active Low (Flash)

WP#/ACC

Hardware Write Protect/Acceleration Pin (Flash)

Flash 3.0 volt-only single power supply

pSRAM Power Supply

Device Ground (Common)

NC

Pin Not Connected Internally

Note: A9 = VID for HV Autoselect mode is not available for MCP product.

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