TLE 4267

Semiconductor Group

3

1998-11-01

Pin Configuration

(top view)

Pin Definitions and Functions

Pin

Symbol

Function

1

I

Input; block to ground directly at the IC by a ceramic capacitor

2E2

Inhibit; device is turned-ON by High signal on this pin; internal

pulldown resistor of 100 k

Ω

3R

Reset Output; open-collector output internally connected to

the output via a resistor of 30 k

Ω

4GND

Ground; connected to rear of chip

5D

Reset Delay; connect with capacitor to GND for setting delay

6E6

Hold; see truth table above for function; this input is connected

to output voltage across pullup resistor of 50 k

Ω

7Q

5-V Output; block to GND with 22-

µF capacitor, ESR < 3 Ω

AEP02123

Ι

E2

R

GND

D

Q

4

3

2

15

6

7

E6

AEP01481

Ι

E2

R

GND

D

Q

4

3

2

15 6 7

E6

P-TO220-7-3

P-TO220-7-230

7

6

5

12 3

4

AEP01724

E6

D

GND

R

E2

Ι

P-TO220-7-180