EVAL6474H

Board description

Doc ID 022766 Rev 1

3/10

Table 2.

Jumpers and connectors description

Name

Type

Function

J1

Power supply

Motor supply voltage

J5

Power output

Bridge A outputs

J6

Power output

Bridge B outputs

J2

SPI connector

Master SPI

J3

SPI connector

Slave SPI

J4

NM connector

OSCIN and OSCOUT pins

J7

NM connector

SYNC output

TP1 (VS)

Test point

Motor supply voltage test point

TP4 (VDD)

Test point

Logic interface supply voltage test point

TP5 (VREG)

Test point

Logic supply voltage/L6474 internal regulator test

point

TP6 (GND)

Test point

Ground test point

TP2 (STCK)

Test point

Step clock input test point

TP8 (DIR)

Test point

DIR output test point

TP3 (STBY/RES)

Test point

STBY/RES input test point

TP7 (FLAG)

Test point

FLAG output test point

Table 3.

Slave SPI connector pinout (J11)

Pin

number

Type

Description

1

Digital input

L6474 direction input

2

Open drain output

L6474 FLAG output

3

Ground

Ground

4

Supply

EXT_VDD (can be used as external logic power supply)

5

Digital output

SPI master IN slave OUT signal (connected to the L6474 SDO

output through daisy chain termination jumper JP2)

6

Digital input

SPI serial clock signal (connected to L6474 CK input)

7

Digital input

SPI master OUT slave IN signal (connected to the L6474 SDI

input)

8

Digital input

SPI slave select signal (connected to the L6474 CS input)

9

Digital input

L6474 step-clock input

10

Digital input

L6474 standby/reset input