SNAD01B

8-CHANNEL 8-BIT ADC

5.After the 8-bits ADC data has been sent out, if the START is kept in LOW and CLK is kept

in High/Low transition, then the data with uncertain value are kept appearing on DIO. These

data can just be ignored.

Channel ID[2:0]

Selected Channel

000

CH0

001

CH1

010

CH2

011

CH3

100

CH4

101

CH5

110

CH6

111

CH7

Table3 Channel Selection Table.

Timing of Digital Input Reading

START

CLK

DI[7]

HiZ

DIO

0

1

1

DI[6] DI[5] DI4] DI[3] DI[2] DI[1] DI[0] DI[7] DI[6] DI[5] DI4] DI[3] DI[2] DI[1] DI[0] DI[7]

Port Input

Port Output

Figure6 The timing diagram of the digital input reading

1. Command ID: (101).

2. The digital data of each channel is sent to the DIO port with the sequence of channel 7 to 0.

3. After all of the channels are read, if the START is kept in LOW and CLK is kept in

HIGH/LOW transition, the digital data of each channel is sent to the DIO port again with the

sequence of channel 7 to 0 cyclically.

4. Pulling START to HIGH terminates this digital input reading.

Note: Once a channel is programmed as analog type, the corresponding data is “0” in digital

input reading command.

Version: 1.3

July 31, 2003

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