MSP430F6433IPZ datasheet(53/106 Pages) TI1

53 / 106 page

MSP430F643x

www.ti.com

SLAS720B – AUGUST 2010 – REVISED AUGUST 2012

PMM, Brown-Out Reset (BOR)

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

BORH on voltage,

V(DVCC_BOR_IT–)

| dDVCC/dt | < 3 V/s

1.45

DVCC falling level

BORH off voltage,

V(DVCC_BOR_IT+)

| dDVCC/dt | < 3 V/s

0.80

1.30

1.50

DVCC rising level

V(DVCC_BOR_hys)

BORH hysteresis

250

Pulse length required at

tRESET

RST/NMI pin to accept a

µs

reset

PMM, Core Voltage

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Core voltage, active

VCORE3(AM)

2.4 V

≤ DVCC ≤ 3.6 V, 0 mA ≤ I(VCORE) ≤ 21 mA

1.90

mode, PMMCOREV = 3

Core voltage, active

VCORE2(AM)

2.2 V

≤ DVCC ≤ 3.6 V, 0 mA ≤ I(VCORE) ≤ 21 mA

1.80

mode, PMMCOREV = 2

Core voltage, active

VCORE1(AM)

2 V

≤ DVCC ≤ 3.6 V, 0 mA ≤ I(VCORE) ≤ 17 mA

1.60

mode, PMMCOREV = 1

Core voltage, active

VCORE0(AM)

1.8 V

≤ DVCC ≤ 3.6 V, 0 mA ≤ I(VCORE) ≤ 13 mA

1.40

mode, PMMCOREV = 0

Core voltage, low-current

VCORE3(LPM)

2.4 V

≤ DVCC ≤ 3.6 V, 0 µA ≤ I(VCORE) ≤ 30 µA

1.94

mode, PMMCOREV = 3

Core voltage, low-current

VCORE2(LPM)

2.2 V

≤ DVCC ≤ 3.6 V, 0 µA ≤ I(VCORE) ≤ 30 µA

1.84

mode, PMMCOREV = 2

Core voltage, low-current

VCORE1(LPM)

2 V

≤ DVCC ≤ 3.6 V, 0 µA ≤ I(VCORE) ≤ 30 µA

1.64

mode, PMMCOREV = 1

Core voltage, low-current

VCORE0(LPM)

1.8 V

≤ DVCC ≤ 3.6 V, 0 µA ≤ I(VCORE) ≤ 30 µA

1.44

mode, PMMCOREV = 0

PMM, SVS High Side

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

SVSHE = 0, DVCC = 3.6 V

I(SVSH)

SVS current consumption

SVSHE = 1, DVCC = 3.6 V, SVSHFP = 0

200

SVSHE = 1, DVCC = 3.6 V, SVSHFP = 1

2.0

µA

SVSHE = 1, SVSHRVL = 0

1.59

1.64

1.69

SVSHE = 1, SVSHRVL = 1

1.79

1.84

1.91

V(SVSH_IT–)

SVSH on voltage level

(1)

SVSHE = 1, SVSHRVL = 2

1.98

2.04

2.11

SVSHE = 1, SVSHRVL = 3

2.10

2.16

2.23

SVSHE = 1, SVSMHRRL = 0

1.62

1.74

1.81

SVSHE = 1, SVSMHRRL = 1

1.88

1.94

2.01

SVSHE = 1, SVSMHRRL = 2

2.07

2.14

2.21

SVSHE = 1, SVSMHRRL = 3

2.20

2.26

2.33

V(SVSH_IT+)

SVSH off voltage level

(1)

SVSHE = 1, SVSMHRRL = 4

2.32

2.40

2.48

SVSHE = 1, SVSMHRRL = 5

2.56

2.70

2.84

SVSHE = 1, SVSMHRRL = 6

2.85

3.00

3.15

SVSHE = 1, SVSMHRRL = 7

2.85

3.00

3.15

(1)

The SVSH settings available depend on the VCORE (PMMCOREVx) setting. See the Power Management Module and Supply Voltage

Supervisor chapter in the MSP430x5xx and MSP430x6xx Family User's Guide (SLAU208) on recommended settings and usage.

MSP430F6433IPZ Datasheet(PDF) 53 Page - Texas Instruments

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