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RM48L952 Datasheet(PDF) 16 Page - Texas Instruments |
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RM48L952 Datasheet(HTML) 16 Page - Texas Instruments |
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16 / 156 page  RM48L952 SPNS177 – SEPTEMBER 2011 www.ti.com 2.4.1.9 Multi-Buffered Serial Peripheral Interface Modules (MibSPI) Table 2-12. PGE Multi-Buffered Serial Peripheral Interface Modules (MibSPI) Terminal Signal Default Pull Type Description Type Pull State Signal Name 144 PGE MIBSPI1CLK 95 I/O Pull Up Programmable, MibSPI1 clock, or GIO 20uA MIBSPI1NCS[0]/MIBSPI1SOMI[1]/MII_TXD[2]/ 105 MibSPI1 chip select, or USB1.RCV GIO MIBSPI1NCS[1]/N2HET1[17]/MII_COL 130 /USB1.SUSPEND MIBSPI1NCS[2]/N2HET1[19]/MDIO 40 N2HET1[15]/MIBSPI1NCS[4] 41 Pull Down Programmable, MibSPI1 chip select, or 20uA GIO N2HET1[24]/MIBSPI1NCS[5]/MII_RXD[0] 91 MIBSPI1NENA/N2HET1[23]/MII_RXD[2]/ 96 Pull Up Programmable, MibSPI1 enable, or GIO USB1.VP 20uA MIBSPI1SIMO 93 MibSPI1 slave-in master-out, or GIO N2HET1[08]/MIBSPI1SIMO[1]/MII_TXD[3]/ 106 Pull Down Programmable, MibSPI1 slave-in USB1.OverCurrent 20uA master-out, or GIO MIBSPI1SOMI 94 Pull Up Programmable, MibSPI1 slave-out 20uA master-in, or GIO MIBSPI1NCS[0]/MIBSPI1SOMI[1]/MII_TXD[2]/ 105 USB1.RCV MIBSPI3CLK 53 I/O Pull Up Programmable, MibSPI3 clock, or GIO 20uA MIBSPI3NCS[0]/AD2EVT/GIOB[2] 55 MibSPI3 chip select, or GIO MIBSPI3NCS[1]/N2HET1[25]/MDCLK 37 MIBSPI3NCS[2]/I2C_SDA/N2HET1[27] 4 MIBSPI3NCS[3]/I2C_SCL/N2HET1[29] 3 N2HET1[11]/MIBSPI3NCS[4]/N2HET2[18]/ 6 Pull Up Programmable, MibSPI3 chip select, or USB2.OverCurrent/USB_FUNC.VBUSI 20uA GIO MIBSPI3NENA /MIBSPI3NCS[5]/N2HET1[31] 54 Pull Up Programmable, MibSPI3 chip select, or 20uA GIO MIBSPI3NENA/MIBSPI3NCS[5]/N2HET1[31] 54 MibSPI3 enable, or GIO MIBSPI3SIMO 52 MibSPI3 slave-in master-out, or GIO MIBSPI3SOMI 51 MibSPI3 slave-out master-in, or GIO MIBSPI5CLK/MII_TXEN 100 I/O Pull Up Programmable, MibSPI5 clock, or GIO 20uA MIBSPI5NCS[0] 32 MibSPI5 chip select, or GIO MIBSPI5NENA/MII_RXD[3]/USB1.VM 97 MibSPI5 enable, or GIO MIBSPI5SIMO[0]/MII_TXD[1] 99 MibSPI5 slave-in master-out, or GIO MIBSPI5SOMI[0]/MII_TXD[0] 98 MibSPI5 slave-out master-in, or GIO 2.4.1.10 Ethernet Controller Table 2-13. PGE Ethernet Controller: MDIO Interface Terminal Signal Default Pull Type Description Type Pull State Signal Name 144 PGE MIBSPI3NCS[1]/N2HET1[25]/MDCLK 37 Output Pull Up - Serial clock output MIBSPI1NCS[2]/N2HET1[19]/MDIO 40 I/O Pull Up Fixed, 20uA Serial data input/output 16 Device Package and Terminal Functions Copyright © 2011, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: RM48L952 |
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