Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

SN74ALVC00-EP Datasheet(PDF) 2 Page - Texas Instruments

Click here to check the latest version.
Part # SN74ALVC00-EP
Description  QUADRUPLE 2-INPUT POSITIVE-NAND GATE
PDF  9 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

SN74ALVC00-EP Datasheet(HTML) 2 Page - Texas Instruments

  SN74ALVC00-EP Datasheet HTML 1Page - Texas Instruments SN74ALVC00-EP Datasheet HTML 2Page - Texas Instruments SN74ALVC00-EP Datasheet HTML 3Page - Texas Instruments SN74ALVC00-EP Datasheet HTML 4Page - Texas Instruments SN74ALVC00-EP Datasheet HTML 5Page - Texas Instruments SN74ALVC00-EP Datasheet HTML 6Page - Texas Instruments SN74ALVC00-EP Datasheet HTML 7Page - Texas Instruments SN74ALVC00-EP Datasheet HTML 8Page - Texas Instruments SN74ALVC00-EP Datasheet HTML 9Page - Texas Instruments  
Zoom Inzoom in Zoom Outzoom out
 2 / 9 page
background image
SN74ALVC00EP
QUADRUPLE 2INPUT POSITIVENAND GATE
SCES521A − DECEMBER 2003 − REVISED MAY 2004
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC
−0.5 V to 4.6 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1)
−0.5 V to 4.6 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO (see Notes 1 and 2)
−0.5 V to VCC + 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0)
−50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0)
−50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO
±50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND
±100 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
θJA (see Note 3): D package
86
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package
113
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg
−65
°C to 150°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
2. This value is limited to 4.6 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 4)
MIN
MAX
UNIT
VCC
Supply voltage
1.65
3.6
V
VCC = 1.65 V to 1.95 V
0.65
× VCC
VIH
High-level input voltage
VCC = 2.3 V to 2.7 V
1.7
V
VIH
High-level input voltage
VCC = 2.7 V to 3.6 V
2
V
VCC = 1.65 V to 1.95 V
0.35
× VCC
VIL
Low-level input voltage
VCC = 2.3 V to 2.7 V
0.7
V
VIL
Low-level input voltage
VCC = 2.7 V to 3.6 V
0.8
V
VI
Input voltage
0
3.6
V
VO
Output voltage
0
VCC
V
VCC = 1.65 V
−4
IOH
High-level output current
VCC = 2.3 V
−12
mA
IOH
High-level output current
VCC = 2.7 V
−12
mA
VCC = 3 V
−24
VCC = 1.65 V
4
IOL
Low-level output current
VCC = 2.3 V
12
mA
IOL
Low-level output current
VCC = 2.7 V
12
mA
VCC = 3 V
24
∆t/∆v
Input transition rise or fall rate
5
ns/V
TA
Operating free-air temperature
−40
85
°C
NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.



Html Pages

1 2 3 4 5 6 7 8 9


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com