Analog Node

I/O Node

Ferrite Bead

0.1 µF

( 3)

´

0.1 µF

( 3)

´

10 µF

10 µF

PCB

Supply

LVPECL

LVPECL

130

(2)

W

82

(2)

W

CDCM9102

www.ti.com

SCAS922

– FEBRUARY 2012

capacitors provide the very low-impedance path for high-frequency noise and guard the power supply system

against induced fluctuations. The bypass capacitors also provide a source of instantaneous current as required

by the device output stages. Therefore, bypass capacitors must have low ESR. To properly use the bypass

capacitors, they must be placed very close to the power supply pins and must be laid out with short loops to

minimize inductance.

Figure 14 shows a general recommendation for decoupling the power supply. The CDCXM9102 power supplies

fall into one of two categories: analog supplies (VDD3, VDD4, and VDD5), and input/output supplies (VDD1,

VDD2, and VDD6). Short the analog supplies together to form the analog supply node; likewise, short the

input/output supplies together to form the I/O supply node. Isolate the analog node from the PCB power supply

and I/O node by inserting a ferrite bead. This helps isolate the high-frequency switching noises generated by the

clock drivers and I/O from the sensitive analog supply node. Choosing an appropriate ferrite bead with low dc

resistance is important, as it is imperative to maintain a voltage at the power-supply pin of the CDCM9102 that is

over the minimum voltage needed for its proper operation.

Figure 14. CDCM9102 Power Supply Decoupling

– Power Pin Bypass Concept

OUTPUT TERMINATION

The CDCM9102 is a 3.3-V clock driver which has the following options for the output type: LVPECL, LVDS, and

LVCMOS.

LVPECL TERMINATION

The CDCM9102 is an open emitter for LVPECL outputs. Therefore, proper biasing and termination is required to

ensure correct operation of the device and to optimize signal integrity. The proper termination for LVPECL is

50

Ω to (Vcc-2) V but this dc voltage is not readily available on a board. Thus a Thevenin’s equivalent circuit is

worked out for the LVPECL termination in both direct-coupled (dc) and ac-coupled cases, as shown in Figure 15

and Figure 16. It is recommended to place all resistive components close to either the driver end or the receiver

end. If the supply voltages of the driver and receiver are different, ac coupling is required.

Figure 15. LVPECL Output Termination (DC-Coupled)

Copyright

© 2012, Texas Instruments Incorporated

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Product Folder Link(s): CDCM9102