STA333BW datasheet(31/67 Pages) STMICROELECTRONICS

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STA333BW

Doc ID 13773 Rev 3

31/67

6.1.5

Configuration register E (addr 0x04)

Max power correction variable

Max power correction

Setting the MPC bit turns on special processing that corrects the STA333BW power device

at high power. This mode should lower the THD+N of a full FFX system at maximum power

output and slightly below. If enabled, MPC is operational in all output modes except tapered

(OM[1,0] = 01) and binary. When OCFG = 00, MPC has no effect on channels 3 and 4, the

line-out channels.

Noise-shaper bandwidth selection

AM mode enable

STA333BW features a FFX processing mode that minimizes the amount of noise generated

in frequency range of AM radio. This mode is intended for use when FFX is operating in a

device with an AM tuner active. The SNR of the FFX processing is reduced to approximately

83 dB in this mode, which is still greater than the SNR of AM radio.

SVE

ZCE

DCCV

PWMS

AME

NSBW

MPC

MPCV

001

Table 34.

Max power correction variable

Bit

R/W

RST

Name

Description

0R/W

MPCV

0: use standard MPC coefficient

1: use MPCC bits for MPC coefficient

Table 35.

Max power correction

Bit

R/W

RST

Name

Description

1R/W

MPC

0: function disabled

1: enables power bridge correction for THD

reduction near maximum power output.

Table 36.

Noise-shaper bandwidth selection

Bit

R/W

RST

Name

Description

R/W

NSBW

1: third-order NS

0: fourth-order NS

Table 37.

AM mode enable

Bit

R/W

RST

Name

Description

3R/W

AME

0: normal FFX operation.

1: AM reduction mode FFX operation

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